introduction
I have been involved in embedded software development for nearly five years, and I have almost always used ARM Cortex M core series microcontrollers. During these five years, thanks to the existence of C language compilers, I can develop without touching assembly, but it seems that I have missed some scenery, the beauty of the field to the compiler and the beauty of the CPU, so I decided to explore the beauty of the ARM CPU architecture and the mystery of the C language compiler by searching for information, hands-on experiments, and drawing conclusions during the boring rest time on weekends. (Because I personally really don’t agree with the teaching method of microcomputer principle courses in school).
1. Arm Instruction Set Architecture
The ARM instruction set architecture is abbreviated as ISA, which supports three instruction sets: A64, A32, and T32.
The A64 instruction set is in Armv8-A to support 64-bit architecture
The A32 instruction set is called the ARM instruction set in the Armv6 and Armv7 architectures.
The T32 instruction set is called the Thumb instruction set in the Armv6 and Armv7 architectures.
A32 Instruction Set
The A32 instruction set, also known as the ARM instruction set in architectures before armv8, has a fixed instruction length of 32 bits and is 4-byte aligned.
T32 Instruction Set
The T32 instruction set is called the Thumb instruction set in architectures before armv8.
Initially, the length of the ARM instruction set was fixed at 32 bits. In order to improve the code density of user code, the Thumb instruction set was designed as a 16-bit instruction set. Developers can use both the ARM instruction set and the Thumb instruction set to reduce code size. However, these are two sets of instruction sets and two operating states. It is very troublesome to switch back and forth between the ARM state and the Thumb state.
As time went by and Thumb-2 technology was introduced, as a supplement to the Thumb instruction set, most of the functions of the ARM instruction set were incorporated into the Thumb instruction set, and the Thumb instruction set evolved into a 16-bit and 32-bit mixed-length instruction set, called the Thumb-2 instruction set.
The creation of the Thumb-2 instruction set allows compilers to balance performance and code size in a single instruction set, providing excellent code density and minimizing system memory size and cost.
ARM also provides a series of architectural extensions to meet the needs of the next generation of processors. These extensions provide ARM processors with some new features.
DSP Expansion
DSP for Cortex-M provides high-performance signal processing capabilities for ARM Cortex-M processors for use in scenarios such as sound, audio, sensor hubs, and machine learning. Signal processing tasks can be completed without the need for additional DSP devices.
Processors with DSP extensions include Cortex-M4, Cortex-M7, Cortex-M33, Cortex-M35P, and Cortex-M55 processors.
DSP extension instructions are added based on the Thumb instruction set and optional floating-point unit, which adds digital signal processing to the Cortex-M processor while maintaining the ease of use of the original Cortex-M programming model.
SIMD instructions
These Cortex-M processors with DSP extensions also provide SIMD instructions to operate on 8-bit or 16-bit integers.
SIMD stands for Single Instruction Multiple Data. On the basis that all registers are still 32 bits, SIMD instructions can operate on two 16-bit values or four 8-bit values at the same time.
Instructions that work on 8-bit or 16-bit data are very useful for processing video data or audio data, because these data do not require a 32-bit width. SIMD instructions provide the ability to process these data in parallel.
Floating point unit
ARM floating-point unit technology provides high-performance and efficient hardware support for half-precision, single-precision and double-precision floating-point operations.
The Arm floating-point unit uses a complete software library support and is fully compatible with the IEEE-754 standard. It is particularly suitable for application scenarios that require high floating-point calculation accuracy.
The application scenarios of floating-point data types are as follows:
Car control program
3D Graphics
Industrial Control Systems
Motion Control System
Helium
ARM Helium technology is the M Configuration Vector Extension (MVE) for the ARM Cortex-M processor family. This technology is an extension of the Armv8.1-M architecture and provides significant performance improvements for machine learning applications in small embedded devices.
The Cortex-M55 is the first processor to feature this extension.
Helium technology adds more than 150 new scalar and vector instructions. Among them, integer Helium technology enables efficient calculation of 8-bit, 16-bit, and 32-bit fixed-point data. The 16-bit and 32-bit fixed-point formats are widely used in traditional signal processing, such as audio processing, while the 8-bit fixed-point format is important in machine learning processing, such as neural network calculations, image processing, etc.
Likewise, Helium also supports floating-point data types, including single-precision floating-point numbers (32 bits) and half-precision floating-point numbers (16 bits).
3. What instruction set does Cortex-M use?
Having discussed the basic instruction set and extended instruction set of ARM, it is time to answer the question we raised: What instruction set does ARM Cortex-M use?
ARM Cortex-M all support only one instruction set: Thumb instruction set or Thumb-2 instruction set. To be precise, it supports T32 instruction set.
Among the many members of the Cortex-M camp, each processor has different support for the Thumb/Thumb-2 instruction set, and most processors support a subset of the Thumb/Thumb-2 instruction set.
The Thumb instruction set supported by the Cortex-M0, Cortex M3, Cortex M4, and Cortex M7 series is shown in the figure below.
The Thumb instructions supported by the Cortex-M23 and Cortex-M33 cores are shown in the figure below. The yellow part in the figure represents the instructions newly added by the ArmV8-M series:
This is the end of the second stop of the ARM exploration journey! See you at the next stop!
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