Design and implementation of binocular vision monitoring system based on DM642

Since the binocular vision monitoring system can imitate the functions of the human eye, perceive the three-dimensional world information, and obtain the depth information from the object to the CCD camera, it has begun to be used in fields that require three-dimensional stereoscopic detection in recent years. In addition, the binocular vision monitoring system can also be used for multi-scene monitoring, which greatly expands the human field of vision. Binocular vision has always been a hot research topic in the field of machine vision, and has gradually shown a very broad development prospect in application fields such as industrial control, intelligent transportation, finance, and public safety. The binocular vision monitoring system based on DM642 is analyzed and studied in detail, the system's software and hardware design scheme is given, and the system functions are implemented on the DM642 development evaluation board (EVM).

1 Hardware structure of binocular vision monitoring system

The overall hardware structure of the binocular visual monitoring system is shown in Figure 1. In Figure 1, the dual-channel video encoding and decoding chips use Philips' SAA7105 and SAA7115H. The SDRAM uses two HY57V283220T series chips with a capacity of 128 Mb from Hynix. The FLASH uses AMD's AM29LV series chips with a capacity of 8 Mb. The core processing chip is TI's DM642, which has rich peripheral interfaces and complete programmability, making it widely used in the field of digital video processing.

The system uses dual CCD cameras and two SAA7115H chips, and the two video capture video ports Video Port0 and VideoPort1 of DM642 to form a dual-channel video acquisition system that is both independent and interconnected, realizing real-time acquisition of dual-channel video. The analog video signals captured by the dual CCD cameras are converted by the analog/digital conversion of their respective channels SAA7115H to form digital video signals in BT.656 format, which are then input from Video Port0 and 1 of DM642 after level conversion; in DM642, the dual-channel video data is processed by the corresponding algorithm, and then converted by the video encoding chip SAA7105 from VideoPort 2 to output PAL analog video signals to the monitor for display, ultimately realizing dual-channel video that can be freely switched and displayed simultaneously on one monitor.

The system connects SDRAM and FLASH memory through the EMIF interface of DM642. SDRAM expands the available storage space of the system, and the system initialization code and configuration information are stored in FLASH.

2 System Software Design

The system software flow is shown in Figure 2.

The system software uses TI's reference framework RF-5 (Reference Framework) based on DSP/BIOS to help achieve the interaction and coordination synchronization of each link in the system process. Before entering the DSP/BIOS scheduler, the program needs to initialize multiple modules to be used. Including:

(1) Initialization of DM642 and system board. The system performs BIOS and CSL initialization, sets EMIF, CE0 and CE1 spaces to allow cache, sets DMA priority queue length to maximum value, sets L2 request priority to highest, and allocates internal and external stacks when DMA manager is initialized.

(2) RF-5 module initialization. The channel module of the system is set to RF-5, and the internal unit communication and information transfer required by the ICC and SCOM modules in RF-5 are initialized, and the channel is set according to the internal and external stack buffer execution.

(3) Establish capture and playback channels. Establish and start a capture channel, and establish and start a playback channel.

After completing the initialization work, the system enters the acquisition, task, and display threads under the management of the DSP/BIOS scheduler. These three threads send messages to each other through the SCOM module of RF-5. The acquisition thread is mainly responsible for acquiring input data to complete the work of capturing digital video signals, and then resamples the color difference signal in the YUV 4:2:2 format to change it to the YUV 4:2:0 format. The task thread loads the GEL control (.gel) and uses the keyboard to enter the number representing the function of the corresponding video channel in the generated dialog box. The system then calls the program code corresponding to the number to achieve real-time video acquisition of the corresponding channel. The display thread waits for the data processed by the task thread and reversely resamples it so that the image in the YUV 4:2:2 format can be sent to SAA7105 for A/D conversion and sent to the monitor for display.

3 System Function Test

In the test, when the program is loaded, the DM642 EVM starts working, and the dual channels start to collect video in real time, process and display it on the monitor. Due to the program settings, the displayed screen is a dual-channel video image. Each channel screen occupies half of the display, as shown in Figure 3.

Load the Channel.gel file and run it. In the generated dialog box, enter 0 and 1 (representing the selection of video channels 0 and 1, respectively). After the program is run, the video image displayed on the monitor switches from displaying the dual-channel image to displaying the image of video channels 0 and 1 without delay, as shown in Figure 4.

The test results show that the system realizes the free coordinated switching of the two channels of dual-channel video and has good real-time performance.

4 Conclusion

The binocular vision monitoring system based on DM642 chip was analyzed, and the system hardware and software design was studied and given. The GEL control was used to achieve the coordinated work of dual-channel real-time video acquisition and display, providing software and hardware support for the subsequent research of binocular vision monitoring system.