Problems and Countermeasures in Application of PIC16C71/PIC16C84 Microcontroller

1: Problems and solutions of PIC16C71 microcontroller

Question 1: After the chip enters the low-power sleep mode (SLEEP MODE), its oscillator pin will be in a floating state, which will increase the sleep power consumption of the chip, which is more than 10μA higher than the indicator in the original manual.

Countermeasure: Adding a 10MΩ resistor between the oscillator pin OSC1 and ground (GND) can prevent OSC1 from entering a floating state without affecting the normal oscillation of the microcontroller.

Question 2: The RA port direction register TRISA is currently only a 4-bit register, corresponding to RA0~RA3, and not an 8-bit register corresponding to RA0~RA4 as stated in the manual. That is, RA4 does not have a corresponding input/output direction control bit. It is an I/O pin with open-pole output and Schmitt input.

Countermeasure: Avoid using read-modify-write instructions (such as BCF RA, BSF RA) on port RA to avoid unintentional changes to the input/output state of RA4. For operations on port RA, register operations should be used (MOVWF RA).

Question 3: When the CPU is executing a read-modify-write instruction on the INTCON register, if an interrupt request occurs, the read interrupt routine will be executed twice. This is because the GIE bit in the INTCON register will be automatically cleared by the hardware (masking all interrupts) after the interrupt request occurs, and the program will enter the interrupt routine entry (0004H). When the GIE bit is cleared, if the CPU happens to be executing a read-modify-write instruction on INTCON (such as BSF INTCON, etc.), the GIE bit will be reset to 1 by the write-back operation, which will cause the CPU to enter the interrupt routine twice.

Countermeasure: If you need to modify an interrupt enable bit of INTCON in the program, you should set GIE=0 in advance.

Question 4: When the chip voltage VDD power-on rise time is greater than 100μs, the power-on reset circuit POR and the power-on delay circuit PWRT may not function normally, causing the chip reset to be abnormal (i.e. PC ≠ reset address). Generally, it is recommended not to use PWRT in this case.

Countermeasure: If the VDD rise time is very long, this chip generally requires a longer power-on delay. A reliable power-on delay method is shown in Figure 1, with an external reset circuit at the MCLR terminal.

Question 5: If RA3 is used as the reference voltage input in A/D conversion, the maximum full-scale error (NFS) is greater than the specification in the manual. The actual situation is shown in Table 1.

Table 1 A/D full scale error table

2. Problems and solutions of PIC16C84 microcontroller

Question 1: The E/W cycle of the internal E2PROM data memory of the PIC16C84 microcontroller occasionally exceeds the maximum value (10ms).

Countermeasure: In the program, the WR bit in the EECON1 register should be used to determine the completion of the write cycle, or the "write cycle complete interrupt" function should be enabled. These two methods can ensure that the write is completed.

Question 2: The relationship between VDD and oscillation frequency is shown in Table 2.