Thoughts on Keil MDK LPC2100 startup file

;/*****************************************************************************/

;/* STARTUP.S: Startup file for Philips LPC2000                               */

;/*****************************************************************************/

;/* <<< Use Configuration Wizard in Context Menu >>>                          */ 

;/*****************************************************************************/

;/* This file is part of the uVision/ARM development tools.                   */

;/* Copyright (c) 2005-2007 Keil Software. All rights reserved.               */

;/* This software may only be used under the terms of a valid, current,       */

;/* end user licence from KEIL for a compatible version of KEIL software      */

;/* development tools. Nothing else gives you the right to use this software. */

;/*****************************************************************************/

;/*

; *  The STARTUP.S code is executed after CPU Reset. This file may be 

; *  translated with the following SET symbols. In uVision these SET 

; *  symbols are entered under Options - ASM - Define.

; *

; *  REMAP: when set the startup code initializes the register MEMMAP 

; *  which overwrites the settings of the CPU configuration pins. The 

; *  startup and interrupt vectors are remapped from:

; *     0x00000000  default setting (not remapped)

; *     0x80000000  when EXTMEM_MODE is used

; *     0x40000000  when RAM_MODE is used

; *

; *  EXTMEM_MODE: when set the device is configured for code execution

; *  from external memory starting at address 0x80000000.

; *

; *  RAM_MODE: when set the device is configured for code execution

; *  from on-chip RAM starting at address 0x40000000.

; *

; *  EXTERNAL_MODE: when set the PIN2SEL values are written that enable

; *  the external BUS at startup.

; */

; Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs

; Seven modes, 8 bits after cpsr

Mode_USR        EQU     0x10

Mode_FIQ        EQU     0x11

Mode_IRQ        EQU     0x12

Mode_SVC        EQU     0x13

Mode_ABT        EQU     0x17

Mode_AND EQU 0x1B

Mode_SYS        EQU     0x1F

I_Bit           EQU     0x80            ; when I bit is set, IRQ is disabled

F_Bit           EQU     0x40            ; when F bit is set, FIQ is disabled

;//

;//   

;//   

;//   

;//   

;//   

;//   

;//

AND_Stack_Size EQU 0x00000000

SVC_Stack_Size  EQU     0x00000008

ABT_Stack_Size  EQU     0x00000000

FIQ_Stack_Size  EQU     0x00000000

IRQ_Stack_Size  EQU     0x00000080

USR_Stack_Size  EQU     0x00000400

;Interrupt/exception service routine stack, do not add comments after \

ISR_Stack_Size  EQU     (UND_Stack_Size + SVC_Stack_Size + ABT_Stack_Size + \

                         FIQ_Stack_Size + IRQ_Stack_Size)  

 ; Define a data segment, 8 bytes aligned

                AREA    STACK, NOINIT, READWRITE, ALIGN=3 

 ;space allocates a piece of memory space and initializes it with 0. How to determine the first address of this memory space? The first address is the label

Stack_Mem       SPACE   USR_Stack_Size  

__initial_sp    SPACE   ISR_Stack_Size

Stack_Top; This indicates that the top of the stack is a large address and the stack grows downward.

;//

;//   

;//

;The default heap size is 0. Can I use it to dynamically allocate memory when the program is running? Later: If _Microlib is defined, then

;_heap_base and _heap_limit can be referenced by other files. It can be understood as follows: if _Microlib is defined, then

; You can dynamically apply for a heap and modify the size of Heap_Size in the startup file, and then you can use it. By default, there is no heap

;What do you think?

Heap_Size       EQU     0x00000000 

                AREA    HEAP, NOINIT, READWRITE, ALIGN=3

__heap_base 

Heap_Mem        SPACE   Heap_Size

__heap_limit

; VPBDIV definitions ; Frequency multiplication and division related

VPBDIV          EQU     0xE01FC100      ; VPBDIV Address

;//

;// Peripheral Bus Clock Rate

;//   

;//               

;//               

;//               

;//   

;//               

;//               

;//               

;//

VPBDIV_SETUP    EQU     0

VPBDIV_Val      EQU     0x00000000

; Phase Locked Loop (PLL) definitions

PLL_BASE        EQU     0xE01FC080      ; PLL Base Address

PLLCON_OFS      EQU     0x00            ; PLL Control Offset

PLLCFG_OFS      EQU     0x04            ; PLL Configuration Offset

PLLSTAT_OFS     EQU     0x08            ; PLL Status Offset

PLLFEED_OFS     EQU     0x0C            ; PLL Feed Offset

PLLCON_PLLE     EQU     (1<<0)          ; PLL Enable

PLLCON_PLLC     EQU     (1<<1)          ; PLL Connect

PLLCFG_MSEL     EQU     (0x1F<<0)       ; PLL Multiplier

PLLCFG_PSEL     EQU     (0x03<<5)       ; PLL Divider

PLLSTAT_PLOCK   EQU     (1<<10)         ; PLL Lock Status

;//

;//   

;//               <1-32>

;//                M Value

;//   

;//               

;//                P Value

;//

PLL_SETUP       EQU     0

PLLCFG_Val      EQU     0x00000020

; Memory Accelerator Module (MAM) definitions

MAM_BASE        EQU     0xE01FC000      ; MAM Base Address

MAMCR_OFS       EQU     0x00            ; MAM Control Offset

MAMTIM_OFS      EQU     0x04            ; MAM Timing Offset

;//

;//   

;//               

;//               

;//               

;//                Mode

;//   

;//               

;//               

;//                Fetch Cycles

;//

MAM_SETUP       EQU     0

MAMCR_Val       EQU     0x00000002

MAMTIM_Val      EQU     0x00000004

; External Memory Controller (EMC) definitions

EMC_BASE        EQU     0xFFE00000      ; EMC Base Address

BCFG0_OFS       EQU     0x00            ; BCFG0 Offset

BCFG1_OFS       EQU     0x04            ; BCFG1 Offset

BCFG2_OFS       EQU     0x08            ; BCFG2 Offset

BCFG3_OFS       EQU     0x0C            ; BCFG3 Offset

;//

EMC_SETUP       EQU     0

;//   

;//     

;//     

;//     

;//     

;//     

;//     

;//     

;//                                   

;//   

BCFG0_SETUP EQU         0

BCFG0_Val   EQU         0x0000FBEF

;//   

;//     

;//     

;//     

;//     

;//     

;//     

;//     

;//                                   

;//   

BCFG1_SETUP EQU         0

BCFG1_Val   EQU         0x0000FBEF

;//   

;//     

;//     

;//     

;//     

;//     

;//     

;//     

;//                                   

;//   

BCFG2_SETUP EQU         0

BCFG2_Val   EQU         0x0000FBEF

;//   

;//     

;//     

;//     

;//     

;//     

;//     

;//     

;//                                   

;//   

BCFG3_SETUP EQU         0

BCFG3_Val   EQU         0x0000FBEF

;//End of EMC

; External Memory Pins definitions

PINSEL2 EQU 0xE002C014 ; PINSEL2 Address

PINSEL2_Val     EQU     0x0E6149E4      ; CS0..3, OE, WE, BLS0..3, 

                                        ; D0..31, A2..23, JTAG Pins

                PRESERVE8

; Area Definition and Entry Point

;  Startup Code must be linked first at Address at which it expects to run.

                AREA    RESET, CODE, READONLY

                ARM

; Exception Vectors

;  Mapped to Address 0.

;  Absolute addressing mode must be used.

;  Dummy Handlers are implemented as infinite loops which can be modified.

; The legendary interrupt vector table, the program starts here

Vectors         LDR     PC, Reset_Addr         

                LDR     PC, Undef_Addr

                LDR     PC, SWI_Addr

                LDR     PC, PAbt_Addr

                LDR     PC, DAbt_Addr

                NOP                            ; Reserved Vector 

;               LDR     PC, IRQ_Addr

                LDR     PC, [PC, #-0x0FF0]     ; Vector from VicVectAddr

                LDR     PC, FIQ_Addr

Reset_Addr      DCD     Reset_Handler

Undef_Addr      DCD     Undef_Handler

SWI_Addr        DCD     SWI_Handler

PAbt_Addr       DCD     PAbt_Handler

DAbt_Addr DCD DAbt_Handler

                DCD     0                      ; Reserved Address 

IRQ_Addr        DCD     IRQ_Handler

FIQ_Addr DCD FIQ_Handler

Undef_Handler B Undef_Handler

SWI_Handler     B       SWI_Handler

PAbt_Handler B PAbt_Handler

DAbt_Handler B DAbt_Handler

IRQ_Handler     B       IRQ_Handler

FIQ_Handler     B       FIQ_Handler

; Reset Handler

                EXPORT  Reset_Handler

Reset_Handler   

; Setup External Memory Pins

                IF      :DEF:EXTERNAL_MODE

                LDR R0, =BRUSH2

                LDR R1, =PINSEL2_Val

                STR     R1, [R0]

                ENDIF

; Setup External Memory Controller

                IF      EMC_SETUP <> 0

                LDR     R0, =EMC_BASE

                IF      BCFG0_SETUP <> 0

                LDR     R1, =BCFG0_Val

                STR     R1, [R0, #BCFG0_OFS]

                ENDIF

                IF      BCFG1_SETUP <> 0

                LDR     R1, =BCFG1_Val

                STR     R1, [R0, #BCFG1_OFS]

                ENDIF

                IF      BCFG2_SETUP <> 0

                LDR     R1, =BCFG2_Val

                STR     R1, [R0, #BCFG2_OFS]

                ENDIF

                IF      BCFG3_SETUP <> 0

                LDR     R1, =BCFG3_Val

                STR     R1, [R0, #BCFG3_OFS]

                ENDIF

                ENDIF   ; EMC_SETUP

; Setup VPBDIV

                IF      VPBDIV_SETUP <> 0

                LDR     R0, =VPBDIV

                LDR     R1, =VPBDIV_Val

                STR     R1, [R0]

                ENDIF

; Setup PLL

                IF      PLL_SETUP <> 0

                LDR     R0, =PLL_BASE

                MOV R1, #0xAA

                MOV R2, #0x55

;  Configure and Enable PLL

                MOV     R3, #PLLCFG_Val

                STR     R3, [R0, #PLLCFG_OFS] 

                MOV     R3, #PLLCON_PLLE

                STR     R3, [R0, #PLLCON_OFS]

                STR     R1, [R0, #PLLFEED_OFS]

                STR     R2, [R0, #PLLFEED_OFS]

;  Wait until PLL Locked

PLL_Loop        LDR     R3, [R0, #PLLSTAT_OFS]

                ANDS    R3, R3, #PLLSTAT_PLOCK

                BEQ PLL_Loop

;  Switch to PLL Clock

                MOV     R3, #(PLLCON_PLLE:OR:PLLCON_PLLC)

                STR     R3, [R0, #PLLCON_OFS]

                STR     R1, [R0, #PLLFEED_OFS]

                STR     R2, [R0, #PLLFEED_OFS]

                ENDIF   ; PLL_SETUP

; I have setup

                IF      MAM_SETUP <> 0

                LDR R0, =MAM_BASE

                MOV     R1, #MAMTIM_Val

                STR     R1, [R0, #MAMTIM_OFS] 

                MOV     R1, #MAMCR_Val

                STR     R1, [R0, #MAMCR_OFS] 

                ENDIF   ; MAM_SETUP

; Memory Mapping (when Interrupt Vectors are in RAM); Interrupt Vector Remapping

MEMMAP          EQU     0xE01FC040      ; Memory Mapping Control

                IF      :DEF:REMAP

                LDR     R0, =MEMMAP

                IF      :DEF:EXTMEM_MODE

                MOV     R1, #3

                ELIF    :DEF:RAM_MODE

                MOV     R1, #2

                ELSE

                MOV     R1, #1

                ENDIF

                STR     R1, [R0]

                ENDIF

; Initialize Interrupt System

;  ...

; Setup Stack for each mode ;Except for the system mode, the stacks of the six modes are distributed continuously. What about the stack of the system mode?

                LDR     R0, =Stack_Top

;  Enter Undefined Instruction Mode and set its Stack Pointer

                MSR     CPSR_c, #Mode_UND:OR:I_Bit:OR:F_Bit

                MOV     SP, R0

                SUB R0, R0, #AND_Stack_Size

;  Enter Abort Mode and set its Stack Pointer

                MSR     CPSR_c, #Mode_ABT:OR:I_Bit:OR:F_Bit

                MOV     SP, R0

                SUB     R0, R0, #ABT_Stack_Size

;  Enter FIQ Mode and set its Stack Pointer

                MSR     CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit

                MOV     SP, R0

                SUB     R0, R0, #FIQ_Stack_Size

;  Enter IRQ Mode and set its Stack Pointer

                MSR     CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit

                MOV     SP, R0

                SUB     R0, R0, #IRQ_Stack_Size

; Enter Supervisor Mode and set its Stack Pointer ; The stack grows downward

                MSR     CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit

                MOV     SP, R0

                SUB     R0, R0, #SVC_Stack_Size

;  Enter User Mode and set its Stack Pointer

                MSR     CPSR_c, #Mode_USR

                IF      :DEF:__MICROLIB

                EXPORT __initial_sp

                ELSE

                MOV     SP, R0

                SUB     SL, SP, #USR_Stack_Size

                ENDIF

; Enter the C code

                IMPORT  __main

                LDR     R0, =__main

                BX R0 ; Jump with state switching, not jumping to main(), related to C/C++ library function, to be explained in detail;

                IF      :DEF:__MICROLIB

                EXPORT __heap_base ; export declares a symbol that can be referenced by other files

                EXPORT  __heap_limit

                ELSE

; User Initial Stack & Heap  

; This program segment defines the stack. How to use the C external interface to dynamically allocate memory?

;The segment name defined by area can be used to specify the area in scatter

                AREA    |.text|, CODE, READONLY 

                IMPORT __use_two_region_memory; external call: use two storage areas?

                EXPORT  __user_initial_stackheap

__user_initial_stackheap  ;

; Put it in the register, what's the use? R0~R4 is used to pass parameters for external programs to set up the stack

;What is the difference with the user-mode stack defined earlier?

                LDR     R0, =  Heap_Mem  

                LDR     R1, =(Stack_Mem + USR_Stack_Size)

                LDR     R2, = (Heap_Mem +      Heap_Size)

                LDR     R3, = Stack_Mem

                BX LR ; Subroutine return

                ENDIF

                END

This post is similar to an essay. I read it many times before I basically understood the startup file. At the beginning, I was very resistant to assembly. Although I read it many times, I didn't read it completely many times. Recently, I found that assembly

It is still quite clear, just a few points. I am still a little confused about the division of the stack. I can only experience it slowly in future applications. I will update it when the time comes. Welcome to discuss it together.