Let's take a look at the contents of the two functions we added in the timer.c file:
TIM_ICInitTypeDef TIM5_ICInitStructure;
//Timer 5 channel 1 input capture configuration
//arr: auto reload value (TIM2, TIM5 are 32 bits!!) psc: clock pre-division number
void TIM5_CH1_Cap_Init(u32 arr,u16 psc)
{
GPIO_InitTypeDef GPIO_InitStructure;
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
NVIC_InitTypeDef NVIC_InitStructure;
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5,ENABLE); //TIM5 clock enable
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); //Enable PORTA clock
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; //GPIOA0
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; //Multiplexing function
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; //速度 100MHz
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; //Push-pull multiplexing output
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN; //下拉
GPIO_Init(GPIOA,&GPIO_InitStructure); //Initialize PA0
GPIO_PinAFConfig(GPIOA,GPIO_PinSource0,GPIO_AF_TIM5); //PA0 multiplex bit timer 5
TIM_TimeBaseStructure.TIM_Prescaler=psc; //Timer frequency division
TIM_TimeBaseStructure.TIM_CounterMode=TIM_CounterMode_Up; //Upward counting mode
TIM_TimeBaseStructure.TIM_Period=arr; //Automatically reload value
TIM_TimeBaseStructure.TIM_ClockDivision=TIM_CKD_DIV1;
TIM_TimeBaseInit(TIM5,&TIM_TimeBaseStructure);
TIM5_ICInitStructure.TIM_Channel = TIM_Channel_1; //Select input IC1 and map it to TI1
TIM5_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising; //Rising edge capture
TIM5_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI; //Map to TI1
TIM5_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1; //Configure input frequency division, no frequency division
TIM5_ICInitStructure.TIM_ICFilter = 0x00; //IC1F=0000 Configure input filter No filtering
TIM_ICInit(TIM5, &TIM5_ICInitStructure); //Initialize TIM5 input capture parameters
TIM_ITConfig(TIM5,TIM_IT_Update|TIM_IT_CC1,ENABLE); //Enable update and capture interrupts
TIM_Cmd(TIM5,ENABLE ); //Enable timer 5
NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=2; //Preemption priority 2
NVIC_InitStructure.NVIC_IRQChannelSubPriority =0; //Response priority 0
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQ channel enable
NVIC_Init(&NVIC_InitStructure); //Initialize VIC registers according to the specified parameters,
}
//Capture status
//[7]: 0, no successful capture; 1, successful capture once.
//[6]: 0, low level has not been captured yet; 1, low level has been captured.
//[5:0]: The number of overflows after capturing a low level (for a 32-bit timer, the 1us counter is incremented by 1, and the overflow time is 4294 seconds)
u8 TIM5CH1_CAPTURE_STA=0; //Input capture status
u32 TIM5CH1_CAPTURE_VAL; // Input capture value (TIM2/TIM5 is 32 bits)
//Timer 5 interrupt service routine
void TIM5_IRQHandler(void)
{
if((TIM5CH1_CAPTURE_STA&0X80)==0)//Not captured successfully
{
if(TIM_GetITStatus(TIM5, TIM_IT_Update) != RESET)//溢出
{
if(TIM5CH1_CAPTURE_STA&0X40)//High level has been captured
{
if((TIM5CH1_CAPTURE_STA&0X3F)==0X3F)//The high level is too long
{
TIM5CH1_CAPTURE_STA|=0X80; //Marks a successful capture
TIM5CH1_CAPTURE_VAL=0XFFFFFFFF;
}else TIM5CH1_CAPTURE_STA++;
}
}
if(TIM_GetITStatus(TIM5, TIM_IT_CC1) != RESET)//Capture 1 capture event occurs
{
if(TIM5CH1_CAPTURE_STA&0X40) //Capture a falling edge
{
TIM5CH1_CAPTURE_STA|=0X80; //Marks a successful capture of a high level pulse width
TIM5CH1_CAPTURE_VAL=TIM_GetCapture1(TIM5); //Get the current capture value.
TIM_OC1PolarityConfig(TIM5,TIM_ICPolarity_Rising); //Set rising edge capture
}else //Not started yet, first capture rising edge
{
TIM5CH1_CAPTURE_STA=0; //Clear
TIM5CH1_CAPTURE_VAL=0;
TIM5CH1_CAPTURE_STA|=0X40; //Marker captures the rising edge
TIM_Cmd(TIM5,ENABLE ); //Enable timer 5
TIM_SetCounter(TIM5,0); //Clear the counter
TIM_OC1PolarityConfig(TIM5,TIM_ICPolarity_Falling); //Set falling edge capture
TIM_Cmd(TIM5,ENABLE ); //Enable timer 5
}
}
}
TIM_ClearITPendingBit(TIM5, TIM_IT_CC1|TIM_IT_Update); //Clear interrupt flag
}
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