In output mode: ODR is the data output register,
but in input mode, it is also used to configure the pull-up and pull-down settings.
In the key input experiment in the Alientek source code, there is the following initialization code:
void KEY_Init(void){
RCC->APB2ENR|=1<<2; //Enable PORTA clock
GPIOA->CRL&=0XFFFFFFF0; //PA0 is set as input
GPIOA->CRL|=0X00000008;
GPIOA->CRH&=0X0F0FFFFF; //PA13,15 are set as input
GPIOA->CRH|=0X80800000;
GPIOA->ODR|=1<<13; //PA13 is pulled up, PA0 is pulled down by default
GPIOA->ODR|=1<<15; //PA15 is pulled up
}
Users often ask why the port is set as input, and then the output register must be written, GPIOA->ODR|=1<<15; //There is indeed no description of PA15 pull-up
in the Chinese data sheet. The following is from the English manual (found on the Internet):
That is, when the port is set to pull-up/pull-down input, the pull-down input or pull-up input is set by setting
the corresponding bit of GPIOx->ODR to 0 or 1. 0000 (0) Analog input, usually used for AD sampling 0100 (4) Floating input, if there is an external pull-up or pull-down, this 1000 (8) Pull-up/pull-down input can be used to enable the internal pull-up/pull-down structure, so that the port is set to a certain level when idle. The specific level is determined by GPIOx->ODR. Setting it to 1 means high level, and setting it to 0 means low level. In the library function, this is how it is implemented in void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
// Set the pull-up and pull-down input mode by writing ODR
/* Reset the corresponding ODR bit */
if(GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
{
GPIOx->BRR =(((u32)0x01)<< pinpos); //Write ODR corresponding bit = 0
}
/*Set the corresponding ODR bit */
if(GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
{
GPIOx->BSRR =(((u32)0x01)<< pinpos); //Write ODR corresponding bit = 1
}
ODR Register
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