STM32F103ZET6 — ADC

introduce

The STM32F103ZET6 has a 12-bit ADC, which is a successive approximation analog-to-digital converter.

12bits ADC represents the conversion accuracy of ADC. When there is an input reference voltage, ADC inputs the analog signal through the signal line, samples the analog signal, and then stores the sampled digital signal in the data register for software reading (CPU or DMA mode). The stored data is converted according to 12bits after comparison with the reference voltage.

ADC input range: Vref- ≤ Vin ≤ Vref+

ADC Clock

The ADC input clock ADCCLK cannot exceed 14MHz (specified in the Datasheet). It is generated by dividing PCLK2.

Conversion Mode

It supports single conversion and continuous conversion. As the name implies, single conversion only performs one conversion and then writes the value to the data register. Continuous conversion performs ADC operation uninterruptedly and writes the value to the data register.

Channel Description

The ADC has two groups of channels: a regular channel group and an injected channel group.

Rule channel group: equivalent to your normal running program.

Injection channel group: It is equivalent to an interrupt. When your program is running normally, the interrupt can interrupt your execution. Similarly, the conversion of the injection channel can interrupt the conversion of the rule channel. After the injection channel is converted, the rule channel can continue to convert. 

In other words, the injection channel can interrupt the regular ADC data conversion currently in progress. For the time being, just understand it as the concept of priority.

● Regular channel group: consists of up to 16 conversions. The regular channels and their conversion order are selected in the ADC_SQRx registers. The total number of conversions in the regular group should be written to the L[3:0] bits of the ADC_SQR1 register. 

● Injection channel group: consists of up to 4 conversions. The injection channels and their conversion order are selected in the ADC_JSQR register. The total number of conversions in the injection group should be written to the L[1:0] bits of the ADC_JSQR register. 

That is to say, in the regular channel group, 16 analog signals are supported to be input simultaneously, and the analog signals of these channels are sampled to digital signals, and the same is true for the injection channel.

Interrupt Description

● If a regular channel is converted:
─ The conversion data is stored in the 16-bit ADC_DR register
─ The EOC (end of conversion) flag is set

─ If EOCIE is set, an interrupt is generated.

● If an injection channel is converted:
─ The conversion data is stored in the 16-bit ADC_DRJ1 register
─ The JEOC (JEOC End of Conversion) flag is set
─ If the JEOCIE bit is set, an interrupt is generated.

Channel Scan

This mode is used to scan a group of analog channels.

The scan mode can be selected by setting the SCAN bit in the ADC_CR1 register. Once this bit is set, the ADC scans all channels selected by the ADC_SQRX register (for regular channels) or ADC_JSQR (for injected channels). A single conversion is performed on each channel of each group. At the end of each conversion, the next channel of the same group is automatically converted. If the CONT bit is set, the conversion does not stop on the last channel of the selected group, but continues again from the first channel of the selected group.
If the DMA bit is set, the DMA controller transfers the converted data of the regular group channels to the SRAM after each EOC. The converted data of the injected channels are always stored in the ADC_JDRx register.

calibration

The ADC has a built-in self-calibration mode. Calibration can significantly reduce the accuracy errors caused by variations in the internal capacitor bank. During calibration, an error correction code (digital value) is calculated on each capacitor and this code is used to eliminate the errors introduced on each capacitor in subsequent conversions.

It is recommended to perform a calibration after each power-up.

Before starting calibration, the ADC must be powered off (ADON='0') for at least two ADC clock cycles.

sampling time

The conversion time of ADC is not only related to the ADC clock, but also to the sampling time. ADC uses several ADC_CLK cycles to sample the input voltage. The number of sampling cycles can be changed by the SMP[2:0] bits in the ADC_SMPR1 and ADC_SMPR2 registers. Each channel can be sampled at different times.

The conversion time of ADC is calculated as: Tconv = sampling time + 12.5 cycles

For example: When ADCCLK = 14MHz, the sampling time is 1.5 cycles, Tconv = 1.5 + 12.5 = 14 cycles = 1μs

Environment Description

In the reference voltage, Vref- on the board is directly connected to GND, and Vref+ is connected to Vcc 3.3V.

On the board, use voltage divider resistors for analog input, the resistor is adjustable, and use PC1 port for input

Configuration Process

The configuration process is divided into three stages:

● GPIO port configuration

● DMA configuration

● ADC configuration

GPIO port configuration

static void SK_ADC1GPIOInit(void)
{
    GPIO_InitTypeDef stGpioInit;
 
    /* Enable ADC1 and GPIOC clock */
    RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOC, ENABLE);
 
    /* Configure PC.01  as analog input */
    stGpioInit.GPIO_Pin = GPIO_Pin_1;
    stGpioInit.GPIO_Mode = GPIO_Mode_AIN;
    GPIO_Init(GPIOC, &stGpioInit);
}

DMA Configuration

DMA configuration uses DMA1 channel, so configure the relevant registers of DMA1:

1. Enable DMA1 clock

2. Reset DMA1

3. Configure the peripheral address and memory address for data transfer

4. Data transfer direction is peripherals --> memory

5. Data transfer size is 1 (half word, 16 bits)

6. Disable memory and peripheral address growth

7. Configure memory data and peripheral data width to 16 bits

8. Configure loop mode

9. Configure priority and disable mem2mem

static void SK_ADC1DMAInit(void)

{

    DMA_InitTypeDef stDMA_Init;

    /* Enable DMA clock */

    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);

    /* DMA channel1 configuration */

    DMA_DeInit(DMA1_Channel1);

    stDMA_Init.DMA_PeripheralBaseAddr = ADC1_DR_Address;

    stDMA_Init.DMA_MemoryBaseAddr = (u32)&ADC_ConvertedValue;

    stDMA_Init.DMA_DIR = DMA_DIR_PeripheralSRC;

    stDMA_Init.DMA_BufferSize = 1;

    stDMA_Init.DMA_PeripheralInc = DMA_PeripheralInc_Disable;

    stDMA_Init.DMA_MemoryInc = DMA_MemoryInc_Disable;

    stDMA_Init.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;

    stDMA_Init.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;

    stDMA_Init.DMA_Mode = DMA_Mode_Circular;

    stDMA_Init.DMA_Priority = DMA_Priority_High;

    stDMA_Init.DMA_M2M = DMA_M2M_Disable;

    DMA_Init(DMA1_Channel1, &stDMA_Init);

    /* Enable DMA channel1 */

    DMA_Cmd(DMA1_Channel1, ENABLE);

}

ADC Configuration

Since the application scenario of the test is relatively simple and many usages are not used, it is not enabled during configuration:

For example, analog watchdog, injection conversion, dual ADC, etc. Here we only use the simplest single-channel ADC

The configuration process is as follows:

1. First, configure the ADC clock. Since the maximum supported clock frequency of the ADC is 14MHz, the system main frequency is 72MHz, and the frequency divided to PCLK2 is also 72MHz. The frequency divider of the ADC only supports the frequency division coefficients of 2/4/6/8. Temporarily set it to 8, that is, 72/8 = 9MHz.

2. Configure ADC to independent mode (configuration in dual mode selection)

3. Turn off SCAN mode (multi-channel ADC is used, single channel is not used temporarily)

4. Enable continuous conversion mode

5. Turn off external triggering and trigger independently by software

6. Right-align data

7. The number of conversion channels is 1 regular channel

Since the injection channel and external trigger are not used here, many registers are not configured.

8. Configure the sampling time of Ch11 of ADC 1 and the number of channels for regular sampling

9. Enable DMA of ADC1

10. Turn on and wake up ADC1

11. Initialize the calibration register and calibrate ADC1

void SK_ADC1Init(void)

{

    ADC_InitTypeDef stADC_Init;

    RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);

    /// Step 1 : Configure I/O Pin First

    SK_ADC1GPIOInit();

    /// Step 2 : Configure DMA

    SK_ADC1DMAInit();

    /// Step 3 : PCLK2 div in 8, ADC CLK => 9Mhz

    RCC_ADCCLKConfig(RCC_PCLK2_Div8);

    /// Step 4 : Configure Basic function of ADC1

    stADC_Init.ADC_Mode = ADC_Mode_Independent;

    stADC_Init.ADC_ScanConvMode = DISABLE;

    stADC_Init.ADC_ContinuousConvMode = ENABLE;

    stADC_Init.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;

    stADC_Init.ADC_DataAlign = ADC_DataAlign_Right;

    stADC_Init.ADC_NbrOfChannel = 1;

    ADC_Init(ADC1, &stADC_Init);

    /// Step 5 : Configure Ch11 sample rate

    ADC_RegularChannelConfig(ADC1, ADC_Channel_11, 1, ADC_SampleTime_55Cycles5);

    /// Step 6 : Enable ADC1 DMA

    ADC_DMACmd(ADC1, ENABLE);

    /// Step 7 : Enable ADC1

    ADC_Cmd(ADC1, ENABLE);

    /// Step 8 : Reset Calibration Register

    ADC_ResetCalibration(ADC1);

    while(ADC_GetResetCalibrationStatus(ADC1));

    /// Step 9 : Start Calibration

    ADC_StartCalibration(ADC1);

    while(ADC_GetCalibrationStatus(ADC1));

    /// Step 10 : Software trigger ADC1

    ADC_SoftwareStartConvCmd(ADC1, ENABLE);

}

Finally, don't forget that 12-bit precision corresponds to a granularity of 4096, that is, if you divide the number into 4096 parts and convert it into voltage, it is:

(float)ADC_ConvertedValue/4096*3.3