1. MSP430F5438A has three timers: TA0, TA1 and TB0.
2. CCR0 has a single interrupt vector with the highest priority. The other CCR1--CCR5 share a common interrupt vector.
3. Interrupt vector:
#define TIMER1_A1_VECTOR (48 * 2u) /* 0xFFE0 Timer1_A3 CCR1-2, TA1 */
#define TIMER1_A0_VECTOR (49 * 2u) /* 0xFFE2 Timer1_A3 CCR0 */
#define TIMER0_A1_VECTOR (53 * 2u) /* 0xFFEA Timer0_A5 CCR1-4, TA0 */
#define TIMER0_A0_VECTOR (54 * 2u) /* 0xFFEC Timer0_A5 CCR0 */
#define TIMER0_B1_VECTOR (59 * 2u) /* 0xFFF6 Timer0_B7 CCR1-6, TB */
#define TIMER0_B0_VECTOR (60 * 2u) /* 0xFFF8 Timer0_B7 CCR0 */
4. Please refer to the following table when writing code
Interrupt vector name | Interrupt vector | Timer | meaning | Operation Register |
TIMER1_A1_VECTOR | 0xFFE0 | TA1 | TA1CCR1-2, TA1IFG Compare match channels 1 and 2, overflow interrupt | TA1CCTL1,TA1CCR1 TA1CCTL2,TA1CCR2 TA1CTL (overflow interrupt) |
TIMER1_A0_VECTOR | 0xFFE2 | TA1 | TA1CCR0 Compare Match Channel 0 | TA1CCTL0,TA1CCR0 |
TIMER0_A1_VECTOR | 0xFFEA | TA0 | TA0CCR1-4, TA0IFG Compare Match Channels 1 to 4 Overflow interrupt | TA0CCTL1,TA0CCR1 TA0CCTL2,TA0CCR2 TA0CCTL3,TA0CCR3 TA0CCTL4,TA0CCR4 TA0CTL (overflow interrupt) |
TIMER0_A0_VECTOR | 0xFFEC | TA0 | TA0CCR0 Compare Match Channel 0 | TA0CCTL0,TA0CCR0 |
TIMER0_B1_VECTOR | 0xFFF6 | TB | TBCCR1-6, TBIFG Compare Match Channels 1 to 6 Overflow interrupt | |
TIMER0_B0_VECTOR | 0xFFF8 | TB | TBCCR0 Compare Match Channel 0 |
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