MMC and PIC microcontroller interface circuit and code design

1 Overview

Sandisc has launched a large-capacity serial Flash memory product - MultiMediaCard (MMC), commonly known as a multimedia card. It is smaller than SmartMedia, is not afraid of impact, can read and write records repeatedly 300,000 times, has a driving voltage of 2.7 to 3.6V, and a variable clock frequency range of 0 to 20MHz. The current common capacity is 64MB/128MB. ATP EleCTRionICs has taken the lead in launching a 1GB high-capacity MMC. In addition to its small size, long life, and large capacity, it also has the advantages of storage area error correction capability, low power consumption, automatic sleep mode after receiving no command word within 5ms, and hot-swap support. MMC can be formatted as a FAT file system for easy reading and writing by the host computer.

2 Introduction to MMC

2.1 Pinout and Function

According to the different storage capacities, MMC has two construction technologies: SMDB and SDMJ. SMDB is binary NAND technology (Binary NAND), and 16MB and 32MB MMC cards use this technology. Currently, the commonly used 64MB and 128MB MMCs use SDMJ, which is MLC (Multi Level Cell) NAND technology. MMC cards of various capacities have the same dimensions and pin arrangement, as shown in Figure 1.

The MMC read-write interface can work under both MMC and SPI communication protocols. MMC is a high-performance three-wire communication protocol developed by the MMCA Association, namely CMD, CLK, and DAT lines. It can address up to 64,000 MMC cards, and a single physical address can stack 30 cards. It supports sequential read and write and single/multiple data block read and write operations, and is the default communication protocol for MMC cards. The SPI protocol is an optional protocol, and its working efficiency is not as good as the MMC protocol; but the SPI protocol is simple and easy to use, has good compatibility, and is easy to connect to a single-chip microcomputer. This design uses the SPI communication protocol, which will be introduced in detail below.

2.2 Internal logical structure

The internal logic structure of the MMC card can be divided into four parts: MMC/SPI interface, single chip controller, data flash memory module, control line and data line. The MMC/SPI interface realizes communication with the main controller.

The single-chip controller completes the interface protocol, data storage retrieval, error correction code algorithm, fault diagnosis processing, power management, and clock control functions. The data memory module can realize single-byte access within the entire storage space. 12 bytes constitute a sector. Depending on the capacity of the MMC card, 16 or 32 sectors constitute an erase group. 32 erase groups constitute a write protect group. This design makes the MMC flexible in operation and easy to use. The control line and data line realize the access to the data storage area. Its internal logical structure is shown in Figure 2.

3 MMC/SPI communication protocol

After the MMC card is powered on, it enters MMC mode by default. If it switches to SPI mode, it needs to switch the mode. The SPI mode setting process is shown in Figure 3.

If you need to switch from SPI mode to MMC mode, you can only cut off the power supply, re-power it on, and enter the default MMC mode. From the perspective of practical application, the SPI mode is simple in design and easy to operate, but the data transmission rate is inferior to the MMC mode. Based on the design requirements, the author adopted the SPI communication protocol.

     4 Memory read and write interface

4.1 SPI interface and operation mode

The SPI interface is a universal synchronous serial interface bus with a word length of 8 bits, which is used to communicate with external devices. The SPI interface uses three lines: CLK, DataIn, and DataOut to read and write data. Among them, CLK is the clock signal provided by an external controller; Datain and DataOut are data input and output lines. CS is the MMC chip select signal line, which must maintain a low-level valid signal during the entire SPI operation process.

The SPI interface has four operation modes, 0, 1, 2, and 3. The SPI operation mode determines the clock phase and polarity when the device receives and sends data, that is, it determines the relationship between the rising and falling edges of the clock signal and the direction of data flow, as shown in Figure 4. This design uses mode 3.

4.2 MMC card command and response signal

All MMC card command words are 6 bytes long, the transmission starts from the high bit, and contains a CRC check word.

The command word index is encoded in binary . For example, the index bit of CMD0 is 000000, and the index bit of CMD39 is 100111. The MMC card command word is divided into 10 command groups, each group consists of multiple command words to complete the MMC card function settings. The Sandisc MMC card in SPI mode supports 6 of these command groups, which can realize basic settings, data block read, data block write, erase, write protection, and MMC card lock functions.

MMC card has multiple response signal formats, and the transmission starts from the high bit. In SPI mode, there are 5 response signal formats, namely R1, R2, R3, Busy, and R1b.

After receiving each command, the MMC card sends a response signal in the format of R1, except for the card status query command word CMD13. This response signal occupies 1 byte, the highest bit is 0, and the lower 7 bits are error flags. If a bit is 1, it means there is a corresponding error.

The Busy response signal is multiple bytes long. All bits are 0, indicating that the card is busy. The presence of a non-zero bit indicates that the card is ready to receive the next command.

The R2 format response signal length is 2 bytes, used to reply to the card status query command word CMD13. The first byte format is the same as R1, and the second byte indicates the error type.

The length of the R3 format response signal is 5 bytes, replying to the card OCR notch read command CMD58. The first byte format is the same as R1, and the remaining 4 bytes are the OCR notch content.

The R1b format response signal consists of two parts, the R1 format part and the Busy format optional additional part.

4.3 MMC transmission timing in SPI mode

The read/write timing of MMC under the SPI protocol is shown in Figure 5. The main controller sends a read/write command, and when the correct response signal is received on the OUT transmission line, the OUT/IN transmission line starts the read/write operation.

5 MMC card and microcontroller interface example

5.1 Hardware Circuit Design

Figure 6 shows a part of the portable data acquisition system designed by the author using a 32MB MMC card from Sandisc
. The single-chip microcomputer uses the PIC16F73B launched by MICroChip of the United States. The operating frequency of the single-chip microcomputer is 4MHz, and the hardware SPI interface of Port C is used for reading and writing operations of the MMC card.

5.2 Software Design

Before accessing the MMC card storage unit, you need to set the access block length. The default length is 512 bytes. This design uses the write cache chip FM24CL64 to transfer to the main memory MMC after reaching 512 bytes (the hardware circuit diagram should be modified accordingly), so the read and write length is no longer set. After the MMC is formatted into the structure of the FAT file system, the data is read by the host computer in the form of a file.

The software design process of the MMC interface is shown in Figure 7.

5.3 MMC card SPI initialization and writing subroutine

Because MMC can work under two protocols and the default operation mode is MMC, it must be initialized before it can work in SPI mode. For the initialization and writing subroutine code, see www.dpj.com.cn.