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1. Watchdog timeout reset
The watchdog overflow reset is caused by not feeding the watchdog in time or not turning off the watchdog at the beginning of the program. The watchdog should be shielded during the debugging phase and the watchdog should be turned off using the WDTCTL = WDTPW + WDTHOLD; statement at the beginning of the program.
2. Stack overflow reset
If the stack overflow causes a reset, you should be glad that you found it. After the program is compiled, you should look at the map to check the current stack usage. The 22×2 stack of 430 and 2471 are both 80B by default, and you can turn on the stack usage alarm. According to the old bird, you should know how much stack you have used. For novices like us, I say that the compiler knows, haha.
3. Reset caused by insufficient voltage and other problems
Since the USB debug of 430 can provide power, sometimes the target board will forget to connect to the power supply. When the program runs to certain places and turns on certain devices, the debug power supply is insufficient, which will cause a reset. The way to avoid forgetting is to change the burning interface to Target power supply for boards with high current.
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