Understanding of STM32 library function SystemInit()

The SystemInit() function appears in the first line of the main() function, which shows its importance. I have never paid attention to the SystemInit() function before, and I only know that it is a function for initializing the STM32 system. Today I decided to take a closer look and start learning STM32 again. This function is in system_stm32f10x.c, and this C file is mainly used for specific hardware configuration related work.

1.  
   

2. 
   

3.  
   

4. void SystemInit (void) 
   

5. { 
   

6.  
   

7.  
   

8. RCC->CR |= (uint32_t)0x00000001; 
   

9. 
   

10.  
    

11. #ifndef STM32F10X_CL 
    

12. RCC->CFGR &= (uint32_t)0xF8FF0000; 
    

13. #else 
    

14. RCC->CFGR &= (uint32_t)0xF0FF0000; 
    

15. #endif  
    

16. 
    

17.  
    

18. RCC->CR &= (uint32_t)0xFEF6FFFF; 
    

19. 
    

20.  
    

21. RCC->CR &= (uint32_t)0xFFFBFFFF; 
    

22. 
    

23.  
    

24. RCC->CFGR &= (uint32_t)0xFF80FFFF; 
    

25. 
    

26. #ifdef STM32F10X_CL 
    

27.  
    

28. RCC->CR &= (uint32_t)0xEBFFFFFF; 
    

29. 
    

30.  
    

31. RCC->CIR = 0x00FF0000; 
    

32. 
    

33.  
    

34. RCC->CFGR2 = 0x00000000; 
    

35. #elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) 
    

36.  
    

37. RCC->CIR = 0x009F0000; 
    

38. 
    

39.  
    

40. RCC->CFGR2 = 0x00000000; 
    

41. #else 
    

42.  
    

43. RCC->CIR = 0x009F0000; 
    

44. #endif  
    

45. 
    

46. #if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) 
    

47. #ifdef DATA_IN_ExtSRAM 
    

48. SystemInit_ExtMemCtl(); 
    

49. #endif  
    

50. #endif 
    

51. 
    

52.  
    

53.  
    

54. SetSysClock(); 
    

55. 
    

56. #ifdef VECT_TAB_SRAM 
    

57. SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET;  
    

58. #else 
    

59. SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;  
    

60. #endif 
    

61. }

From the function description, this function is to initialize the internal FALSH, PLL and update the system clock. This function needs to be called after reset.

1. RCC->CR |= (uint32_t)0x00000001;

The first line of code operates the clock control register to enable the internal 8M high-speed clock. From this we can see that after the system starts up, it first relies on the internal clock source to work.

1. #ifndef STM32F10X_CL 
   

2. RCC->CFGR &= (uint32_t)0xF8FF0000; 
   

3. #else 
   

4. RCC->CFGR &= (uint32_t)0xF0FF0000;

These two lines of code operate the clock configuration register. They mainly set MCO (microcontroller clock output), PLL related (PLL multiplication factor, PLL input clock source), ADCPRE (ADC clock), PPRE2 (high-speed APB division factor), PPRE1 (low-speed APB division factor), HPRE (AHB pre-division factor), SW (system clock switch). At the beginning, the system clock switches to HSI, which is used as the system initial clock. The macro STM32F10X_CL is a macro related to a specific STM32 chip.

1.  
   

2. RCC->CR &= (uint32_t)0xFEF6FFFF; 
   

3. 
   

4.  
   

5. RCC->CR &= (uint32_t)0xFFFBFFFF; 
   

6. 
   

7.  
   

8. RCC->CFGR &= (uint32_t)0xFF80FFFF;

These sentences are to configure the related parameters after turning off HSE, CSS, PLL, etc. and then turn them on to achieve the purpose of taking effect.

1. #ifdef STM32F10X_CL 
   

2.  
   

3. RCC->CR &= (uint32_t)0xEBFFFFFF; 
   

4. 
   

5.  
   

6. RCC->CIR = 0x00FF0000; 
   

7. 
   

8.  
   

9. RCC->CFGR2 = 0x00000000; 
   

10. #elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) 
    

11.  
    

12. RCC->CIR = 0x009F0000; 
    

13. 
    

14.  
    

15. RCC->CFGR2 = 0x00000000; 
    

16. #else 
    

17.  
    

18. RCC->CIR = 0x009F0000; 
    

19. #endif

This section is mainly about interrupt setup. At the beginning, we need to disable all interrupts and clear all interrupt flags. Different hardware has different settings. 

1. #if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) 
   

2. #ifdef DATA_IN_ExtSRAM 
   

3. SystemInit_ExtMemCtl(); 
   

4. #endif  
   

5. #endif

This paragraph is related to setting external RAM. The STM32F103RBT I used has nothing to do with this.

1. SetSysClock();

This is another function, which mainly configures the system clock frequency. The frequency division values ​​of HCLK, PCLK2, and PCLK1 represent AHB, APB2, and APB1 respectively. Of course, it also does other things, such as configuring the FLASH delay period and enabling the pre-fetch buffer period. The details of the latter configuration are not yet understood.

1. #ifdef VECT_TAB_SRAM 
   

2. SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET;  
   

3. #else 
   

4. SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;  
   

5. #endif

This code mainly implements the relocation of the vector table. It depends on whether you want to locate the vector table in the internal SRAM or the internal FLASH. This SCB was not found in the STM32 reference manual at first. It turns out that it is related to the Cortex-M3 core. So ST did not include it. I will learn about the core later, but here is a reminder for myself. 


Then take a look at what the function SetClock() in SystemInit() does.

1. static void SetSysClock(void) 
   

2. { 
   

3. #ifdef SYSCLK_FREQ_HSE 
   

4. SetSysClockToHSE(); 
   

5. #elif definedSYSCLK_FREQ_24MHz 
   

6. SetSysClockTo24(); 
   

7. #elif definedSYSCLK_FREQ_36MHz 
   

8. SetSysClockTo36(); 
   

9. #elif definedSYSCLK_FREQ_48MHz 
   

10. SetSysClockTo48(); 
    

11. #elif definedSYSCLK_FREQ_56MHz 
    

12. SetSysClockTo56(); 
    

13. #elif definedSYSCLK_FREQ_72MHz 
    

14. SetSysClockTo72(); 
    

15. #endif 
    

16. 
    

17.  
    

18. }

It can be seen that different system clocks are set according to different macros, and these macros are in the same source file as this function. The official is very considerate, we only need to select the corresponding macro to achieve the purpose of quickly configuring the system clock.

1. #if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) 
   

2.  
   

3. #define SYSCLK_FREQ_24MHz 24000000 
   

4. #else 
   

5.  
   

6.  
   

7.  
   

8.  
   

9.  
   

10. #define SYSCLK_FREQ_72MHz 72000000 
    

11. #endif

For example, if I need to configure the system clock to 72MHZ, I only need to remove the comment symbols on both sides of #define SYSCLK_FREQ_72MHz 72000000. 
This function also contains the SetSysClockTo72() function, which is used to configure the registers.

1. #elif definedSYSCLK_FREQ_72MHz 
   

2.  
   

3. static void SetSysClockTo72(void) 
   

4. { 
   

5. __IO uint32_t StartUpCounter = 0, HSEStatus = 0; 
   

6. 
   

7.  
   

8.  
   

9. RCC->CR |= ((uint32_t)RCC_CR_HSEON); 
   

10. 
    

11.  
    

12. do 
    

13. { 
    

14. HSEStatus = RCC->CR & RCC_CR_HSERDY; 
    

15. StartUpCounter++; 
    

16. } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); 
    

17. 
    

18. if ((RCC->CR & RCC_CR_HSERDY) != RESET) 
    

19. { 
    

20. HSEStatus = (uint32_t)0x01; 
    

21. } 
    

22. else 
    

23. { 
    

24. HSEStatus = (uint32_t)0x00; 
    

25. } 
    

26. 
    

27. if (HSEStatus == (uint32_t)0x01) 
    

28. { 
    

29.  
    

30. FLASH->ACR |= FLASH_ACR_PRFTBE; 
    

31. 
    

32.  
    

33. FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); 
    

34. FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; 
    

35. 
    

36. 
    

37.  
    

38. RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; 
    

39. 
    

40.  
    

41. RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; 
    

42. 
    

43.  
    

44. RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; 
    

45. 
    

46. #ifdef STM32F10X_CL 
    

47.  
    

48.  
    

49.  
    

50. 
    

51. RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | 
    

52. RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); 
    

53. RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | 
    

54. RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); 
    

55. 
    

56.  
    

57. RCC->CR |= RCC_CR_PLL2ON; 
    

58.  
    

59. while((RCC->CR & RCC_CR_PLL2RDY) == 0) 
    

60. { 
    

61. } 
    

62. 
    

63. 
    

64.  
    

65. RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); 
    

66. RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
    

67. RCC_CFGR_PLLMULL9); 
    

68. #else 
    

69.  
    

70. RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | 
    

71. RCC_CFGR_PLLMULL)); 
    

72. RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); 
    

73. #endif  
    

74. 
    

75.  
    

76. RCC->CR |= RCC_CR_PLLON; 
    

77. 
    

78.  
    

79. while((RCC->CR & RCC_CR_PLLRDY) == 0) 
    

80. { 
    

81. } 
    

82. 
    

83.  
    

84. RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); 
    

85. RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; 
    

86. 
    

87.  
    

88. while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) 
    

89. { 
    

90. } 
    

91. } 
    

92. else 
    

93. {  
    

94. } 
    

95. } 
    

96. #endif

The above code needs to be looked at carefully. That's pretty much it for SystemInit().