S3C6410 Chinese datasheet

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  Chapter 2 Memory Map

 

S3C6410 Chinese datasheet - motor - motor87's blog

  

S3C6410X supports 32-bit physical address field, and this field can be divided into 2 parts, one for memory and one for peripherals.

The main memory is accessed through the SPINE bus, and its address range is from 0X0000_0000 to 0X6FFF_FFFF. The main memory is divided into four areas, the boot image area, the internal storage area, the static storage area, and the dynamic storage area.

The address range of the Boot image area is from 0X0000_0000 to 0X07FF_FFFF, but this is not a real image memory. The Boot image area has a reverse mirror point, which points to a part of the internal storage area or static storage area. The start address of the Boot image is fixed at 0X0000_0000.

The internal memory area is used to access the internal ROM and internal SRAM to boot, it is also called Steppingstone. The first address of any internal storage is fixed. The address range of the internal ROM is from 0X0800_0000 to 0X0BFF_FFFF, but the actual storage space is only 32KB, this range is read-only, and can be mirrored to the boot image area when the internal ROM booting is selected. The address range of the internal SRAM is from 0X0C00_0000 to 0X0FFF_FFFF, but the actual storage space is only 4KB.

The address range of the static memory area is from 0X1000_0000 to 0X3FFF_FFFF. SROM, SRAM, NOR Flash, asynchronous NOR interface devices, OneNAND Flash, and Steppingstone can access these address areas. Any area is represented by a chip select, for example, the address range from 0X1000_0000 to 0X17FF_FFFF represents XM0CSn[0]. The starting address of each chip select is fixed. NAN Flash and CF/ATA cannot access data through the static memory area, so if any of Xm0CSn[5:2] is used for NAND Flash, Steppingstone is mirrored to the address range from 0X2000_0000 to 27FF_FFFF.

The address range of the dynamic memory area is from 0X4000_0000 to 0X6FFF_FFFF. DMC1 has the right to use the address range from 0X5000_000 to 0X6FFF_FFFF. The first address of each chip select is configurable.

The access to external devices is through the PERI bus, and its address range is from 0X7000_0000 to 0X7FFF_FFFF. All SFRS can be accessed within this address range. Moreover, if data needs to be transferred from NFCON or CFCON, these data will be transferred through the PERI bus.


Keywords:S3C6410 Reference address:S3C6410 Chinese datasheet

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