(1) Fuse position M103C
The configuration of M103C will set whether ATmega128 works in ATmega103 compatible mode or in ATmega128 native mode. When ATmega128 leaves the factory, the default state of M103C is "0", which means it works in ATmega103 compatible mode by default. When the user system design makes the chip work in ATmega128 mode, the state of M103C should be configured to "1" first.
(2) CLKSEL0..3
CLKSEL0, CLKSEL1, CLKSEL2, and CLKSEL3 are used to select the clock source of the system. There are five different types of clock sources to choose from (each type has fine divisions). The default state of the chip when it leaves the factory is that CLKSEL3..0 and SUT1..0 are "0001" and "10" respectively. That is, the internal 1MHz RC oscillator is used and the longest startup delay is used. This ensures that the initial ISP download can be performed regardless of whether the external oscillation circuit is working. The rewriting of the CLKSEL3..0 fuse bit needs to be very cautious, because once the rewriting is wrong, the chip will not be able to start.
(3) JTAGEN
If the JTAG interface is not used, the status of JTAGEN should be set to "1", that is, JTAG is disabled and the JTAG pins are used as I/O ports.
(4) SPIEN
SPI mode downloading of data and programs is allowed, and the default state is "0". Generally, its state is retained.
(5) WDTON
The watchdog timer is always on. WDTON defaults to "1", which means that the watchdog timer is always disabled. If this bit is set to "0", the watchdog timer will always be on and cannot be controlled by the internal program. This is designed to prevent unknown code from turning off the watchdog timer by writing registers when the program runs away (although turning off the watchdog timer requires a special method, it guarantees higher reliability).
(6) EESAVE
Whether to keep the contents in E2PROM when executing the erase command. The default state is "1", which means that the contents in E2PROM are erased together with the contents in Flash. If this bit is set to "0", the erase command before downloading the program will only be effective for the FLASH code area, but not for the E2PROM area. This is very useful when you want to keep the data in E2PROM when updating the system program.
(7) BOOTRST
Determines the address of the first instruction executed when the chip is powered on. The default state is "1", indicating that execution starts from 0x0000 when starting. If BOOTRST is set to "0", the program will be executed from the starting address of the BOOTLOADER area when starting. The size of the BOOTLOADER area is determined by BOOTSZ1 and BOOTSZ0, so its first address also changes accordingly.
(8) BOOTSZ1 and BOOTSZ0
These two bits determine the size of the BOOTLOADER area and its starting address. The default state is "00", which means that the BOOTLOADER area is 4096 words and the starting address is 0xF000.
(9) It is recommended that users use ISP method to configure fuse bits
The configuration tool uses BASCOM-AVR (online download trial version, which has no restrictions on ISP downloads) and a download cable compatible with STK200/STK300.
Note: Different AVRs have different fuses, so you must carefully check the chip manual before use.
It is important to pay attention to manual learning, not only to master how to use it, but also to understand and master the principles and structure from the root. For hardware engineers, the data manual is the real "scripture", and everything else is "cultivation experience". If you are not familiar with the "scripture", you cannot become a "fairy". This is also one of the purposes of "M128" and "M8"!
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