Detailed explanation of STM32 serial port sending data-EEWORLD

Collect

Serial port interrupt mode:

/**
* @brief Enables or disables the specified USART interrupts.
* @param USARTx: where x can be 1 or 2 to select the USART peripheral.
* @param USART_IT: specifies the USART interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg USART_IT_WU: Wake up interrupt. //Wake-up interrupt
* @arg USART_IT_CM: Character match interrupt.//Character match interrupt
* @arg USART_IT_EOB: End of block interrupt. //Block end interrupt
* @arg USART_IT_RTO: Receive time out interrupt. //Receive timeout interrupt
* @arg USART_IT_CTS: CTS change interrupt. //CTS change interrupt
* @arg USART_IT_LBD: LIN Break detection interrupt. //Termination detection interrupt* @arg USART_IT_TXE
: Tansmit Data Register empty interrupt. //Transmit data register empty interrupt
* @arg USART_IT_TC: Transmission complete interrupt. //Transmission completion interrupt
* @arg USART_IT_RXNE: Receive Data register not empty interrupt. //Receive register not empty interrupt
* @arg USART_IT_IDLE: Idle line detection interrupt. //Idle line detection interrupt
* @arg USART_IT_PE: Parity Error interrupt. //Parity error interrupt
* @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) //Error interrupt
* @param NewState: new state of the specified USARTx interrupts.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/

First, post this part of the data sheet.

Character transmission procedure

1. Program the M bits in USARTx_CR1 to define the word length.

2. Select the desired baud rate using the USARTx_BRR register.

3. Program the number of stop bits in USARTx_CR2.

4. Enable the USART by writing the UE bit in USARTx_CR1 register to 1.

5. Select DMA enable (DMAT) in USARTx_CR3 if Multi buffer Communication is to take

place. Configure the DMA register as explained in multibuffer communication.

6. Set the TE bit in USARTx_CR1 to send an idle frame as first transmission.

7. Write the data to send in the USARTx_TDR register (this clears the TXE bit). Repeat

this for each data to be transmitted in case of single buffer.

8. After writing the last data into the USARTx_TDR register, wait until TC=1. This

indicates that the transmission of the last frame is complete. This is required for

instance when the USART is disabled or enters the Halt mode to avoid corrupting the

last transmission.

Character transmission process

1. In the scheme, the M bit of USARTx_CR1 is used to define the word length.

2. Select the desired baud rate using the USARTx_BRR register.

3. Program the number of stop bits in USARTx_CR2.

4. Enable the USART by writing the UE bit in register 1 USARTx_CR1.

5. Select DMA Enable (DMAT) in USARTx_CR3 if multi-buffer communication is to be taken

Configuring DMA registers is explained in Multi-buffer Communication.

6. Set the TE bit in USARTx_CR1 to send an idle frame as the first transmission.

7. Write the data to be transmitted in the USARTx_TDR register (this will clear the TXE bit). Repeat

This is done for each data transfer in a single buffer.

8. After writing the last data to the USARTx_TDR register, wait until TC=1.

Indicates that the transmission of the last frame is complete. This is required

For example, when the USART is disabled or put into suspend mode, to avoid corruption

Last transmission.

Detailed explanation of sending data via STM32 serial port - Dahai - Dahai's blog

First, take a closer look at the timing diagram of the data being sent.

It is found that when USART_TDR has no data, that is, it is empty, TXE will be set. When writing data to USART_TDR, TXE is low.

List the conditions for TXE and TCflag changes

TXE: Set as long as USART_TDR has no data

TCflag: The interruption will only occur when all TXline data is sent out.

Sending process: write data into USART_TDR->TXline sends out.

That is, TCflag is set one character later than TXEflag.

Character transmission process

(change)

1. Enable the serial port to send TE. At this time, USART_DR is empty. At this time, check whether TXE is set to 1. TXE is set to 1. The TX pin first sends an idle frame, writes the F1 frame to USART_DR, and TXE is cleared. Because the idle frame is being sent at this time, the data written to USART_DR is placed in the TDR register and has not yet been copied to the shift register.
2. After the idle frame is sent, the data in the TDR register is copied to the shift register. At this time, check whether TXE is set to 1. TXE is set to 1, indicating that TDR is empty and the next data can be placed. At this time, the data of the F1 frame will be sent on the TX pin, and the software writes the data of the F2 frame to USART_DR, and TXE is cleared.
3. After the stop bit of the F1 frame is sent, because F2 in the TDR register has not been copied into the shift register, TXE is still 0 at this time, and TC is not set to 1. At this time, check whether TXE is set to 1. TXE is set to 1, indicating that TDR is empty and the next data can be placed. At this time, the data of F2 frame will be sent on TX pin, and the software will write the data of F3 frame into USART_DR, and TXE will be cleared.
4. After the stop bit of F2 frame is sent, because F3 in TDR register has not been copied into shift register, TXE is still 0, and TC is not set to 1. At this time, check whether TXE is set to 1. TXE is set to 1, indicating that TDR is empty, and no data is written to USART_DR later. TXE remains high, and the data of F3 frame will be sent on TX pin.
5. After the stop bit of F3 frame is sent, because TXE is 1 at this time, the TC flag will be set to 1. If TCIE is 1, an interrupt will be generated.

Note a few points when sending via the serial port:
1. If data is being sent, writing data into USART_DR will write the data into the TDR buffer register. After the current transmission is completed, the data in TDR will be copied into the shift register.
2. If data is not being sent, writing data into USART_DR will put the data directly into the shift register without passing through TDR. TXE is cleared, and then the transmission starts, and TXE is set to 1 by hardware.
3. TC will only be set to 1 when the stop bit of a frame of data is sent and TXE is 1.

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