Figure 9.8 《ADC0809 pin diagram》
1. Internal structure of ADC0809
The internal logic structure diagram of ADC0809 is shown in Figure 9-7.
Figure 9.7 《ADC0809 internal logic structure》
The multi-way switch in the figure can select 8 analog channels, allowing 8 analog inputs to be shared and converted by a common A/D converter. This is an economical multi-channel data acquisition method. The address latch and decode circuit completes the latching and decoding of the three address bits A, B, and C. Its decoded output is used for channel selection. Its conversion result is stored and output through the three-state output latch, so it can be directly connected to the system data bus. Table 9-1 is the channel selection table.
Table 9-1 Channel selection table
2. Signal pins
The ADC0809 chip is a 28-pin dual in-line package, and its pin arrangement is shown in Figure 9.8.
The functions of the main signal pins of ADC0809 are described as follows:
IN7~IN0——Analog input channel
ALE——Address latch enable signal. Corresponding to the rising edge of ALE, the A, B, and C address states are sent to the address latch.
START - conversion start signal. When START rises, ADC0809 is reset; when START falls, the chip is started and A/D conversion begins; during A/D conversion, START should remain low. This signal is sometimes abbreviated as ST.
A, B, C - address lines. Channel port selection lines, A is the low address, C is the high address, and the pin diagram is ADDA, ADDB and ADDC. The corresponding relationship between the address state and the channel is shown in Table 9-1.
CLK——Clock signal. There is no clock circuit inside ADC0809, and the required clock signal is provided by the outside world, so there is a clock signal pin. The clock signal with a frequency of 500KHz is usually used.
EOC——Conversion end signal. EOC=0, conversion in progress; EOC=1, conversion end. This status signal can be used as a query status flag or as an interrupt request signal.
D7~D0——Data output line. It is a three-state buffer output form and can be directly connected to the data line of the microcontroller. D0 is the lowest bit and D7 is the highest bit.
OE——Output enable signal. It is used to control the three-state output latch to output the converted data to the microcontroller. OE=0, the output data line is high impedance; OE=1, the converted data is output.
Vcc—— +5V power supply.
Vref——Reference power supply The reference voltage is used to compare with the input analog signal as a benchmark for successive approximation. Its typical value is +5V (Vref(+)=+5V, Vref(-)=-5V).
9.2.2 Interface between MCS-51 MCU and ADC0809
The connection between ADC0809 and MCS-51 microcontroller is shown in Figure 9.10.
The circuit connection mainly involves two issues: one is the selection of 8 analog signal channels, and the other is the transmission of converted data after A/D conversion is completed.
1. 8 analog channel selection
Figure 9.10 Connection between ADC0809 and MCS-51
As shown in Figure 9.11, the analog channel selection signals A, B, and C are connected to the lowest three bits of address A0, A1, and A2, namely (P0.0, P0.1, and P0.2), respectively, and the address latch enable signal ALE is controlled by P2.0. The addresses of the 8 analog channels are 0FEF8H~0FEFFH. In addition, the channel address is selected as a write selection signal. The connection of this part of the circuit is shown in Figure 9.12.
Figure 9.11 Partial signal connection of ADC0809
Figure 9.12 Time coordination of signals
As can be seen from the figure, the ALE signal is connected to the START signal, so that the channel address is written (latched) on the leading edge of the signal, and the conversion is started immediately on the trailing edge. Figure 9.19 is a schematic diagram of the timing coordination of the relevant signals.
To start A/D conversion, only one MOVX instruction is needed. Before that, P2.0 should be cleared and the lowest three bits corresponding to the port address of the selected channel should be sent to the data pointer DPTR. For example, to select IN0 channel, the following two instructions can be used to start A/D conversion:
MOV DPTR, #FE00H; send to the port address of 0809
MOVX @DPTR, A; Start A/D conversion (IN0)
Note: The A here has nothing to do with A/D conversion and can be any value.
2. Transmission of conversion data
The data obtained after A/D conversion should be transmitted to the microcontroller for processing in a timely manner. The key issue of data transmission is how to confirm the completion of A/D conversion, because only after confirmation can it be transmitted. To this end, the following three methods can be used.
(1) Scheduled transmission method
For an A/D converter, the conversion time is a known and fixed technical indicator. For example, the conversion time of ADC0809 is 128μs, which is equivalent to 64 machine cycles of a 6MHz MCS-51 microcontroller. Based on this, a delay subroutine can be designed. This subroutine is called after the A/D conversion is started. When the delay time is reached, the conversion must have been completed, and then data transmission can be carried out.
(2) Query method
The A/D conversion chip has a status signal indicating that the conversion is completed, such as the EOC terminal of ADC0809. Therefore, the EOC status can be tested in a query manner to determine whether the conversion is completed and then proceed with data transmission.
(3) Interrupt mode
The status signal (EOC) indicating the completion of the conversion is used as an interrupt request signal to transmit data in interrupt mode.
Regardless of which method is used, once the conversion is completed, the data can be transmitted through instructions. First, the export address is sent and when the signal is valid, the OE signal is valid, and the converted data is sent to the data bus for the microcontroller to receive.
Regardless of which method is used, once the conversion is confirmed to be complete, data can be transferred through instructions. The instruction used is the MOVX read instruction. Taking Figure 9-17 as an example, there are
MOV DPTR , #FE00H
MOVX A , @DPTR
This instruction sends out a valid signal while sending out the valid port address, making the output enable signal OE of 0809
The three-state gate output is turned on, and the converted data is sent to the A accumulator through the data bus.
It should be noted here that the three address terminals A, B, and C of ADC0809 can be connected to the address lines as described above, or they can be connected to the data lines, such as D0 to D2. This is the instruction to start A/D conversion, which is similar to the above, except that the content of A cannot be an arbitrary number, but must be consistent with the selected input channel number IN0 to IN7. For example, when A, B, and C are connected to D0, D1, and D2 respectively, the instruction to start A/D conversion of IN7 is as follows:
MOV A, #07H; D2D1D0=111 select IN7 channel
9.2.3 A/D conversion application example
There is an 8-channel analog input patrol monitoring system. The sampled data is stored in the external RAM 0A0H~0A7H units in sequence. According to the interface circuit shown in Figure 9.10, the 8 channel addresses of ADC0809 are 0FEF8H~0FEFFH. The data sampling initialization program and interrupt service program (assuming only one sampling) are as follows:
Initialization procedure:
|
MOV |
R0, #0A0H |
; The first address of the data storage area |
|
MOV |
R2, #08H |
; 8-way counter |
|
SETB |
IT1 |
;Edge trigger mode |
|
SETB |
EA |
; Interrupt enable |
|
SETB |
EX1 |
; Enable external interrupt 1 interrupt |
|
MOV |
DPTR, #0FEF8H |
; D/A converter address |
LOOP: |
MOVX |
@DPTR, A |
; Start A/D conversion |
HERE: |
SJMP |
HERE |
; Wait for interrupt |
Interrupt service routine:
|
DJNZ |
R2, ADEND |
|
|
MOVX |
A, @DPTR |
; Data sampling |
|
MOVX |
@R0, A |
; Storage |
|
INC |
DPTR |
; Point to the next analog channel |
|
INC |
R0 |
; Point to the next unit of data memory |
|
MOVX |
@DPTR, A |
|
ADEND: |
RETI |
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