About 51 MCU external interrupt response-EEWORLD

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It is best to set the external interrupt mode to the falling edge mode, especially when the interrupt pin is connected to a button.

External falling edge interrupt: SETB IT0. The hardware automatically samples the pin in each machine cycle. If the level changes from high to low in two consecutive cycles, it is considered that there is an interrupt request, and IE0 = 1. IE0 will remain until the interrupt request is responded to by the CPU. It will not be automatically cleared before the response. Only after the response will the hardware automatically clear IE0 to IE0 = 0.

External low-level interrupt: CLR IT0. When the interrupt pin is at a low level and maintains a machine cycle, the hardware automatically sets IE0=1. If the interrupt pin is sampled at a high level in the next cycle, the hardware automatically clears IE0 to 0. Conditions for automatically clearing the interrupt flag: The falling edge interrupt will only be cleared to 0 when the CPU responds to the interrupt, otherwise it will remain. Low-level interrupt: At any time when the external interrupt pin is at a low level, IE0=1; when it is at a high level, IE0=0, so there is no need to respond to the interrupt to clear it to 0, which is related to the pin status. Note: When EA=0, the interrupt pin is at a low level and IE0 will not be automatically set to 1. It will only be automatically set to 1 when EA=1.

When there are two CPUs in the single-chip design, the main CPU should pay attention to the following when controlling the interrupt of the sub-CPU: when the main CPU sends an interrupt signal, the sub-CPU can receive it in time, that is, the sub-CPU working state is not allowed to run in the program with CLR EA disabled. As long as the sub-CPU is not working in the program with interrupt disabled, the sub-CPU can respond to the interrupt signal sent by the main CPU in time. In addition, if the falling edge method is used, the interval between the high and low levels sent by the main CPU only needs one NOP instruction. Therefore, this time difference problem should be considered as much as possible. Sometimes, the main CPU sends an interrupt signal before the sub-CPU has finished running the program that masks the interrupt, causing the sub-CPU to be unable to interrupt or to work intermittently.

Keyboard interrupts can finally come to an end today.

Now I know that having a program structure does not mean that the program is easy to complete. More time is spent on debugging, simulation, debugging again, and so on. So when you encounter problems, you must be patient, confident, and careful. If you do these three things, you will succeed! ! ! !

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