ARM instruction addressing problem

   ENTRY
BootloAd
   LDR r0, =0x00            
   LDR r1, =0x00          
   LDR r2, =0x00          
   LDR r3, =0x00  
   END
   
1) In the ARM program, how to specify the location where the instruction is stored in the ROM (similar to the ORG pseudo-instruction of the microcontroller)
I think no matter which ARM chip, there must be a power-on reset address, that is, the location where the PC points after power-on. For example, the reset address of a certain ARM chip is 0x00000000, and the first instruction I want to execute after reset is LDR R0, =0x00. So how do we specify in the program to put this instruction at the 0x00 position of ROM?

2) The role of the ENTRY pseudo-instruction
The ENTRY pseudo-instruction is the entry point of the program. A program can only have one ENTRY. When generating an IMAGE file in ELF format, it can tell the emulator which instruction to start executing the program, but when generating a BIN file, what is its use? ? We hope to burn the instruction below ENTRY to the power-on reset address of the ARM chip. The reset address of each chip may be different. How can ADS know the reset address of the actual chip through ENTRY?

3) The role of RO BASE during ARM LINKER configuration
I set RO BASE to 0x3000 in the configuration page of ARM LINKER. By simulating the AXF file generated by AXD, I observed that the instruction LDR r0, =0x00 was placed at 0x3000 in the memory. This seems to indicate that the starting position of the program in ROM can be set by setting RO BASE. But I see that the BIN file generated at the same time has only 16 bytes. If the chip is burned with a burner, how does the burner know that the first byte of the BIN file should be placed at 0x3000 in the ROM? (Not by filling in the burning start address in the burning software as 0x3000)

 VECTORS. S is set in ADS: "section"=STARTUP in vector.s is the first to run.

Similarly. After reset, there is the interrupt vector table. The first one is the reset vector, where
you put a jump. (Usually only a few bytes in size, only a jump can be placed)
Jump to:
  1. Initialization code. InitStAck initializes the stack. . .
  2. C's _MAIN address, run MAIN()

vector.s should be the ARM assembly I wrote myself. Doesn't every project have a vector.s file?
In addition, even if STARTUP is specified as the first instruction to run in the section, how can I match this instruction with the reset address of the hardware? 

It is like this:
    CODE32
    AREA StArtup,CODE,READONLY

        ENTRY
;//Each interrupt vector table is 4 bytes wide. Only one 32-bit ARM instruction can be placed.
Vectors ;BASE+0
        LDR PC, ResetAddr ;The first one of reset. Jump to label; ResetAddr
        LDR PC, UndefinedAddr ;32-bit ARM instruction. BASE+1
        LDR PC, SWI_Addr ;32-bit ARM instruction. BASE+2
        LDR PC, PrefetchAddr
        LDR PC, DAtAAbortAddr        
        DCD 0xb9205f80    
        LDR PC,[PC, #-0xff0]  
        LDR PC,FIQ_Addr
...


ResetAddr:
     BL InitStAck
     B _MAIN
jumps to:
  1. Initialization code. InitStAck initializes the stack. . .
  2. C's _MAIN address, runs MAIN()

Assume that vector.s in my project is the initialization file.
Its main content is:
CODE32
    AREA Startup, CODE, READONLY

        ENTRY
;//Interrupt vector table is 4 bytes wide each. Only one 32-bit ARM instruction can be placed.
Vectors ; BASE+0
        LDR PC, ResetAddr ; The first reset. Jump to label; ResetAddr
        LDR PC, UndefinedAddr ; 32-bit ARM instruction. BASE+1
        LDR PC, SWI_Addr ; 32-bit ARM instruction. BASE+2
        LDR PC, PrefetchAddr
        LDR PC, DAtAAbortAddr         DCD
        0xb9205f80    
        LDR PC,[PC, #-0xff0]   LDR
        PC ,FIQ_Addr     
...


ResetAddr：
     BL InitStAck
     B _MAIN
; = ...