ARM assembly instruction set nine - coprocessor instructions

The format of the CDP instruction is:

CDP{condition} coprocessor code, coprocessor opcode 1, destination register, source register 1, source register 2, coprocessor opcode 2.

The CDP instruction is used by the ARM processor to notify the ARM coprocessor to perform a specific operation. If the coprocessor cannot successfully complete the specific operation, an undefined instruction exception is generated. Among them, coprocessor opcode 1 and coprocessor opcode 2 are the operations to be performed by the coprocessor. The destination register and source register are both coprocessor registers. The instruction does not involve the registers and memory of the ARM processor.

Instruction example:

  CDP P3,2,C12,C10,C3,4; This instruction completes the initialization of coprocessor P3

2. LDC instruction

The format of the LDC instruction is:

LDC{condition}{L} coprocessor code, destination register, [source register]

The LDC instruction is used to transfer word data in the memory pointed to by the source register to the destination register. If the coprocessor cannot successfully complete the transfer operation, an undefined instruction exception is generated. The {L} option indicates that the instruction is a long read operation, such as for the transmission of double-precision data.

Instruction example:

   LDC P3, C4, [R0]; transfers the word data in the memory pointed to by register R0 of the ARM processor to register C4 of coprocessor P3.

3. STC instruction

The format of the STC instruction is:

STC{condition}{L} coprocessor code, source register, [destination register]

The STC instruction is used to transfer word data in the source register to the memory pointed to by the destination register. If the coprocessor cannot successfully complete the transfer operation, an undefined instruction exception is generated. The {L} option indicates that the instruction is a long read operation, such as for the transmission of double-precision data.

Instruction example:

STC P3, C4, [R0]; transfer the word data in register C4 of coprocessor P3 to the memory pointed to by register R0 of the ARM processor.

4. MCR instruction

The format of the MCR instruction is:

MCR{condition} Coprocessor code, coprocessor opcode 1, source register, destination register 1, destination register 2, coprocessor opcode 2.

The MCR instruction is used to transfer data from the ARM processor register to the coprocessor register. If the coprocessor cannot successfully complete the operation, an undefined instruction exception will be generated. Coprocessor opcode 1 and coprocessor opcode 2 are the operations to be performed by the coprocessor, the source register is the register of the ARM processor, and the destination register 1 and destination register 2 are both coprocessor registers.

Instruction example:

   MCR P3,3,R0,C4,C5,6; This instruction transfers the data in the ARM processor register R0 to the registers C4 and C5 of the coprocessor P3.

5. MRC directive

The format of the MRC instruction is:

MRC{condition} Coprocessor code, coprocessor opcode 1, destination register, source register 1, source register 2, coprocessor opcode 2.

The MRC instruction is used to transfer data in the coprocessor register to the ARM processor register. If the coprocessor cannot successfully complete the operation, an undefined instruction exception will be generated. Coprocessor opcode 1 and coprocessor opcode 2 are the operations to be performed by the coprocessor, the destination register is the register of the ARM processor, and source register 1 and source register 2 are both registers of the coprocessor.

Instruction example:

  MRC P3, 3, R0, C4, C5, 6; This instruction transfers the data in the register of coprocessor P3 to the ARM processor register.