Embedded Linux+ARMARM architecture and programming (ARM assembly instructions)

reference:

http://blog.csdn.net/denlee/article/details/2501182

In embedded development, assembler programs are often used in critical places, such as initialization at system startup, environment preservation and recovery when entering and exiting interrupts, and functions with very demanding performance requirements.

1. Relative jump instructions: b and bl. 
The difference is that in addition to jumping, the bl instruction also saves the return address (the address of the next instruction of bl) in the lr register.
Jump range: 32M before and after the current instruction.
They are position-independent instructions.
Example:
        b fun1
......
fun1:
        bl fun2
......
fun2:
......


2. Data transfer instructions: mov, address read pseudo-instruction: ldr
The mov instruction can assign the value of a register to another register, or assign a constant to a register.
Example:
mov r1, r2
mov r1, #4096
The constant transferred by the mov instruction must be represented by an immediate number.
When you don't know whether a number can be represented by an immediate number, you can use the ldr command to assign a value. ldr is a pseudo instruction, it is not a real instruction, the compiler will expand it into a real instruction: if the constant can be represented by an immediate value, use the mov instruction; otherwise, save the constant in a certain location during compilation, and use the memory read instruction to read it out.
Example:
ldr r1, =4097
The original meaning of ldr is "large-range address read pseudo instruction". The following is to obtain the absolute address of the code:
Example:
        ldr r1, =label
label:
......


3. Memory access instructions: ldr, str, ldm, stm
The ldr instruction can be a large-range address read pseudo instruction or a memory access instruction. When there is "=" in front of its second parameter, it indicates a pseudo instruction, otherwise it indicates a memory access instruction. The
ldr instruction reads data from the memory to the register, and the str instruction stores the value of the register to the memory. The data they operate on are all 32 bits.
Example:
ldr r1, [r2, #4] // Read the data of the memory cell at address r2+4 into r1ldr
r1, [r2] // Read the data of the memory cell at address r2 into r1ldr
r1, [r2], #4 // Read the data of the memory cell at address r2 into r1, then r2=r2+4str
r1, [r2, #4] // Save the data of r1 into the memory cell at address r2+4str
r1, [r2] // Save the data of r1 into the memory cell at address r2str
r1, [r2], #4 // Save the data of r1 into the memory cell at address r2, then r2=r2+4ldm
and stm are batch memory access instructions, which can read and write multiple data with only one instruction. The format is:
ldm {cond} { ! } { ^ }
stm {cond} { ! } { ^ }
, where {cond} indicates the execution conditions of the instruction:

Most ARM instructions can be executed conditionally, that is, whether to execute the instruction is determined by the conditional flag in the cpsr register: if the condition is not met, the instruction is equivalent to a nop instruction.
Each ARM instruction contains a 4-bit conditional code field, which means that 16 execution conditions can be defined. The
cpsr conditional flags N, Z, C, and V represent Negative, Zero, Carry, and oVerflow, respectively.

indicates the address change mode, which has 4 modes:
ia (Increment After): post-increment mode.
ib (Increment Before): pre-increment mode.
da (Decrement After): post-decrement mode.
db (Decrement Before): pre-decrement mode.
stores the memory address. If an exclamation mark is added after it, the value of rn will be updated after the instruction is executed, which is equal to the address of the next memory unit.
indicates a register list. For the ldm instruction, data is taken from the memory block corresponding to and written to these registers; for the stm instruction, the values ​​of these registers are written to the memory block corresponding to .
{^} has two meanings:
if there is a pc register in , it means that after the instruction is executed, the value of the spsr register will automatically be put into the cpsr register - this is often used to return from an interrupt handler;
if there is no pc register in , {^} means that the register in user mode is operated, not the register in the current privileged mode.
Example:
HandleIRQ: @Interrupt entry function
        sub lr, lr, #4 @Calculate the return address
        stmdb sp!, { r0 - r12, lr } @Save the used registers
                                                                @r0 - r12, lr are saved in the memory represented by sp
                                                                @“!” makes the instruction execute sp = sp - 14 * 4

        ldr lr, =int_return @Set the return address after calling the IRQ_Handle function
        ldr pc, =IRQ_Handle @Call interrupt distribution function
int_return:
        ldmia sp!, { r0 - r12, pc }^ @Interrupt return, “^” means to transfer the value of spsr to cpsr
                                                                 @So return from irq mode to the interrupted working mode
                                                                 @“!” makes the instruction execute sp = sp + 14 * 4


4. Addition and subtraction instructions: add , sub
Example:
add r1, r2, #1 // r1 = r2 + 1
sub r1, r2, #1 // r1 = r2 - 1


5. Program status register access instructions: msr, mrs
ARM processor has a program status register (cpsr), which is used to control the processor's working mode and set the interrupt switch.
Example:
msr cpsr, r0 // r0 to cpsr
mrs r0, cpsr // cpsr to r0

6. Other pseudo instructions.extern
: define an external symbol (can be a variable or a function)
.text: indicates that the current statements belong to the code segment.global
: define a program label in this file as global


ARM-THUMB subroutine call rules: ATPCS
In order to enable C language programs and assembly programs to call each other, rules must be formulated for subroutine calls. In ARM processors, this rule is called ATPCS: rules for subroutine calls in ARM programs and THUMB programs. The basic ATPCS rules include register usage rules, data stack usage rules, and parameter passing rules.

1. Register usage rules Subroutines
pass parameters through registers r0 ~ r3, and their aliases a1 ~ a4 can be used at this time. The contents of r0 ~ r3 do not need to be restored before the called subroutine returns. 
In a subroutine, r4 ~ r11 are used to save local variables, and their aliases v1 ~ v8 can be used at this time. If some of their registers are used in the subroutine, the values ​​of these registers must be saved when the subroutine enters and restored before returning; for registers not used in the subroutine, these operations are not necessary. In THUMB programs, usually only registers r4 ~ r7 can be used to save local variables.
Register r12 is used as a scratch register between subroutines, and its alias is ip.
Register r13 is used as a data stack pointer, and its alias is sp. Register r13 cannot be used for other purposes in a subroutine. Its value must be the same when entering and exiting a subroutine.
Register r14 is called a link register, and its alias is lr. It is used to save the return address of the subroutine. If the return address is saved in the subroutine (for example, the lr value is saved in the data stack), r14 can be used for other purposes.
Register r15 is the program counter, aliased as pc . It cannot be used for any other purpose.

2. Data stack usage rules
The data stack has two growth directions: when it grows in the direction of decreasing memory address, it is called DESCENDING stack; when it grows in the direction of increasing memory address, it is called ASCENDING stack.
The so-called growth of the data stack is to move the stack pointer. When the stack pointer points to the top element of the stack (the last data pushed into the stack), it is called FULL stack; when the stack pointer points to an empty data unit adjacent to the top element of the stack (the last data pushed into the stack), it is called EMPTY stack.
The data stack can be divided into 4 types:
FD: Full Descending
ED: Empty Descending
FA: Full Ascending
EA: Empty Ascending
ATPCS stipulates that the data stack is of FD type, and the operation on the data stack is 8-byte aligned. Use stmdb / ldmia batch memory access instructions to operate the FD data stack.
When using the stmdb command to save content to the data stack, first decrement the sp pointer and then save the data. When using the ldmia command to restore data from the data stack, first obtain the data and then increment the sp pointer. The sp pointer always points to the top element of the stack, which is exactly the definition of the FD stack.

3. Parameter passing rules
Generally, when the number of parameters does not exceed 4, the four registers r0 ~ r3 are used to pass parameters; if the number of parameters exceeds 4, the remaining parameters are passed through the data stack.
For general return results, r0 ~ r3 are usually used to pass.
Example:
Assume that the CopyCode2SDRAM function is implemented in C language, and its data prototype is as follows:
int CopyCode2SDRAM( unsigned char *buf, unsigned long start_addr, int size )
In the assembly code, use the following code to call it and judge the return value:
ldr r0, =0x30000000 @1. Target address = 0x30000000, which is the starting address of SDRAM
mov r1, #0 @2. Source address = 0
mov r2, #16*1024 @3. Length = 16K
bl CopyCode2SDRAM @Call C function CopyCode2SDRAM
cmp a0, #0 @Judge the return value of the function