·Compatible with MCS-51
·4K bytes of programmable flash memory
Lifespan: 1000 write/erase cycles
Data retention time: 10 years
·Fully static operation: 0Hz-24Hz
·Three-level program memory lock
·128*8-bit internal RAM
·32 programmable I/O lines
·Two 16-bit timers/counters
·5 interrupt sources
·Programmable serial channel
·Low-power idle and power-down modes
·On-chip oscillator and clock circuit
2. Pin description:
P3 port can also be used as some special function ports of AT89C51, as shown in the following table:
Port Pin Alternative Function
P3.0 RXD (Serial Input Port)
P3.1 TXD (Serial Output Port)
P3.2 /INT0 (External Interrupt 0)
P3.3 /INT1 (External Interrupt 1)
P3.4 T0 (Timer 0 External Input)
P3.5 T1 (Timer 1 External Input)
P3.6 /WR (External Data Memory Write Strobe)
P3.7 /RD (External Data Memory Read Strobe)
P3 port also receives some control signals for flash programming and programming verification.
ALE/PROG: When accessing external memory, the output level of the address latch enable is used to latch the address status byte. During FLASH programming, this pin is used to input programming pulses. Normally, the ALE terminal outputs a positive pulse signal with a constant frequency cycle, which is 1/6 of the oscillator frequency. Therefore, it can be used as a pulse for external output or for timing purposes. However, it should be noted that whenever it is used as an external data memory, an ALE pulse will be skipped. If you want to disable the output of ALE, you can set it to 0 at the SFR8EH address. At this time, ALE will only work when executing MOVX, MOVC instructions. In addition, the pin is slightly pulled high. If the microprocessor is in the external execution state, ALE is disabled, and the setting is invalid.
3. Oscillator characteristics:
4. Chip Erase:
In addition, the AT89S51 has steady-state logic, which can be static logic under low to zero frequency conditions, and supports two software-selectable power-down modes. In idle mode, the CPU stops working. However, the RAM, timer, counter, serial port and interrupt system are still working. In power-down mode, the contents of the RAM are saved and the oscillator is frozen, and all other chip functions are disabled until the next hardware reset.
The new features added by 89S51 compared with 89C51 include:
-- Many new features have been added, the performance has been greatly improved, but the price remains basically the same, even lower than 89C51!
-- ISP online programming function. The advantage of this function is that the program in the microcontroller memory does not need to be removed from the working environment. It is a powerful and easy-to-use function.
-- The operating frequency is 33MHz. As we all know, the maximum operating frequency of 89C51 is only 24M, which means that S51 has a higher operating frequency and thus has a faster computing speed.
-- It has a duplex UART serial channel.
-- The internal integrated watchdog timer no longer needs an external watchdog timer unit circuit like 89C51.
-- Dual data indicators.
-- Power off mark.
-- A new encryption algorithm, which makes it impossible to decrypt 89S51, and the confidentiality of the program is greatly enhanced, so that intellectual property rights can be effectively protected from infringement.
-- Compatibility: Fully backward compatible with all 51-word series products. For example, 8051, 89C51 and other early MCS-51 compatible products. That is to say, all the programs in textbooks and online tutorials (regardless of whether the microcontroller used in the textbook is 8051, 89C51, MCS-51, etc.) can run normally on 89S51. This is the so-called backward compatibility.
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