Timer Application PWM Output
1.1 Differences between TIM1_CH1N and TIM1_CH1
When I was about to use the timer, I looked at the schematic diagram and found that for timer 1, each of its output channels is in pairs, that is, TIM1_CH1N and TIM1_CH1 are in a group of two. After searching on the Internet, I understood why the chip is designed in this way.
TIM1 is a complete motor control timer peripheral, TIM1_CH1 and TIM1_CH1N, used to drive the upper and lower power tubes. If Deadtime is 0, TIM1_CH1N is the inversion of TIM1_CH1. If Deadtime is not 0, Deadtime is inserted on TIM1_CH1N to prevent the upper and lower power tubes from being turned on at the same time.
Two other types of pin definitions:
TIM1_ETR is the external trigger input pin;
TIM1_BKIN is a fault signal used to shut down the output of TIM1.
1.2 Timer Configuration and PWM Settings 1.2.1 Timer Related Structures
The timer-related structures obtained from the tutorial CHM in the firmware library.
TIM_BDTRInitTypeDef
BDTR structure definition
TIM_ICInitTypeDef
TIM Input Capture Init structure definition
TIM_OCInitTypeDef
TIM Output Compare Init structure definition
TIM_TimeBaseInitTypeDef
TIM Time Base Init structure definition
TIM_TypeDef
TIM
The structures related to PWM output are mainly:
TIM_TimeBaseInitTypeDef: timer initialization configuration structure
TIM_OCInitTypeDef: Timer output comparison structure
1.2.2 Three speeds of the timer
When I first started learning about timers, I was confused about the speed and technical speed of timers. After learning about the STM32 clock system and several functions in the RCC library, I finally understood the three speeds of timers.
TIMxCLK (timer operating frequency): This frequency is the frequency when we configure the APB1 or APB2 bus in RCC.
TIMx Counter Clock (timer counting frequency): This frequency is the speed at which the timer adds or subtracts the value in the ARR register.
When I was programming 51 single-chip microcomputers before, these two frequencies were often the same. So, at the beginning, I was a little confused about the understanding of these two frequencies.
TIMx Running @ (timer operating frequency): This frequency indicates the time taken by the timer from the start of accumulation or decrement of the ARR register to the next reload of the ARR register. This frequency can be understood as the timing period of our timer in the previous 51 MCU.
After understanding the above three frequencies clearly, the configuration of initializing the timer will be very clear.
1.2.3 Timer Configuration
Timer configuration code
// Compute the prescaler value /
//TIM3CLK is 72 MHz
//TIM3 Counter Clock is 24 MHz
//TIM3 is running at 1 KHz
PrescalerValue = (unsigned int) (72000000 / 36000000) - 1;
PeriodValue = (unsigned int)( 36000000 / 1000 ) - 1;
The three frequency settings: the timer operating frequency is 72MHz, the timer counting frequency is 36MHz, and the timing period is 1KHz. Through these three values, the values of PrescalerValue and PeriodValue are calculated. Prepare for the subsequent structure configuration.
The working frequency of the timer is 72MHz. This is a little experience I found on the Internet. I did not find relevant instructions in the DATASHEET. The final PWM frequency shows that this little experience is correct. The Internet mentioned that the frequency allocated to APB1, that is, the working frequency of the timer provided to TIM3, will be automatically multiplied.
RCC_PCLK1Config(RCC_HCLK_Div2); //Set APB1 clock
The clock I configured for APB1 earlier is the system clock divided by two, that is, 36MHz, and the multiplication mentioned on the Internet, that is, the working frequency of the timer is actually 72MHz. In the end, it was proved that the working frequency of TIM3 was indeed multiplied. There is no verification for other timers. I guess that the timers mounted on APB1 all have the multiplication function, that is, the working frequency of the same timer has been multiplied.
// Time base configuration /
TIM_TimeBaseStructure.TIM_Period = PeriodValue;
TIM_TimeBaseStructure.TIM_Prescaler = PrescalerValue;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0x0;
TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
The values of TIM_Period and TIM_Prescaler have been determined through the previous calculations, where TIM_Prescaler determines the timer frequency and TIM_Period determines the timing period.
// PWM1 Mode configuration: Channel1 /
CCR_Val = (unsigned int) (PeriodValue / 2 );
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = CCR_Val;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
//TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
TIM_OC2PreloadConfig(TIM3, TIM_OCPreload_Enable); //Select the second channel output
TIM_OC2Init(TIM3, &TIM_OCInitStructure); //Select the second channel output
The above is the configuration of the output comparison structure, which ultimately determines the PWM parameters. The PWM frequency is the previous timer timing cycle. The duty cycle is determined by TIM_Pulse. The duty cycle formula is:
DUTY = CCR register value / ARR register value
DUTY = TIM_OCInitStructure.TIM_Pulse / TIM_TimeBaseStructure.TIM_Prescaler-1
//TIM3->CCER &= 0xEEEF;
//TIM3 enable counter
TIM_ARRPreloadConfig(TIM3, ENABLE);
TIM_Cmd(TIM3, ENABLE);
TIM_CtrlPWMOutputs(TIM3,ENABLE);
The final enable configuration of the timer. So far, the configuration of the timer-related structures has ended. After configuring GPIO, you can output PWM waves. In fact, the program flow configures GPIO first, but when I was learning PWM, I spent a lot of time on GPIO and had a deeper understanding of GPIO.
Miscellaneous full text
12 MAY, 2011
STM32 clock system
1.1 Overview of STM32 clock system
In STM32, there are five clock sources: HSI, HSE, LSI, LSE, and PLL.
①. HSI is a high-speed internal clock, RC oscillator, with a frequency of 8MHz.
②. HSE is a high-speed external clock that can be connected to a quartz/ceramic resonator or an external clock source with a frequency range of 4MHz~16MHz.
③. LSI is a low-speed internal clock, RC oscillator, with a frequency of 40kHz.
④. LSE is a low-speed external clock connected to a quartz crystal with a frequency of 32.768kHz.
⑤、PLL is a phase-locked loop frequency multiplication output, and its clock input source can be selected as HSI/2, HSE or HSE/2. The frequency multiplication can be selected as 2~16 times, but its maximum output frequency shall not exceed 72MHz.
The 40kHz LSI is used by the independent watchdog IWDG, and it can also be selected as the clock source of the real-time clock RTC. In addition, the clock source of the real-time clock RTC can also be selected as LSE, or 128-division of HSE. The clock source of RTC is selected by RTCSEL[1:0].
The STM32 has a full-speed USB module, and its serial interface engine requires a 48MHz clock source. This clock source can only be obtained from the PLL output, and can be selected as 1.5 division or 1 division. That is, when the USB module needs to be used, the PLL must be enabled and the clock frequency must be configured to 48MHz or 72MHz.
In addition, the STM32 can also select a clock signal to output to the MCO pin (PA8), which can be selected as the 2-division of the PLL output, HSI, HSE, or system clock.
The system clock SYSCLK is the clock source for most components in STM32. The system clock can be selected as PLL output, HSI or HSE. The maximum frequency of the system clock is 72MHz. It is divided by the AHB divider and sent to each module. The AHB divider can be divided by 1, 2, 4, 8, 16, 64, 128, 256, 512. The clock output by the AHB divider is sent to 5 major modules:
①. HCLK clock sent to AHB bus, core, memory and DMA.
②. The system timer clock is sent to Cortex after being divided by 8.
③. Send the idle running clock FCLK directly to Cortex.
④、Send to APB1 divider. APB1 divider can select 1, 2, 4, 8, 16 frequency division, one of its outputs is used by APB1 peripherals (PCLK1, maximum frequency 36MHz), and the other is sent to timer (Timer) 2, 3, 4 frequency multiplier. The frequency multiplier can select 1 or 2 frequency multiplication, and the clock output is used by timer 2, 3, 4.
⑤. Send to APB2 divider. APB2 divider can select 1, 2, 4, 8, 16 frequency division, one of its outputs is used by APB2 peripherals (PCLK2, maximum frequency 72MHz), and the other is sent to Timer 1 multiplier. The multiplier can select 1 or 2 times, and the clock output is used by Timer 1. In addition, APB2 divider has one output for ADC divider, which is sent to ADC module after frequency division. ADC divider can select 2, 4, 6, 8 frequency division.
Among the above clock outputs, many have enable control, such as AHB bus clock, core clock, various APB1 peripherals, APB2 peripherals, etc. When you need to use a module, remember to enable the corresponding clock first.
It should be noted that the timer multiplier, when the APB division is 1, its multiplier value is 1, otherwise its multiplier value is 2.
The devices connected to APB1 (low-speed peripherals) are: power interface, backup interface, CAN, USB, I2C1, I2C2,
UART2, UART3,
SPI2, window watchdog, Timer2, Timer3, Timer4. Note that although the USB module requires a separate 48MHz clock signal, it should not be the clock for the USB module to work, but only the clock provided to the serial interface engine (SIE). The clock for the USB module to work should be provided by APB1.
The devices connected to APB2 (high-speed peripherals) are: UART1, SPI1, Timer1, ADC1, ADC2, all common IO ports (PA~PE), and second function IO ports.
The figure below is a clock system structure diagram in the STM32 user manual, through which you can have an overall understanding of the STM32 clock system.
1.2 STM32 clock configuration
The following code indicates that an external crystal oscillator is used to provide an oscillation source for the entire system. After the external crystal oscillator is initialized, it is multiplied by the PLL and then provides clocks for the system clock and peripherals mounted on the AHB, APB1 and APB2 buses.
void RCC_Configuration(void)
{
//------------------------------------------------ ---------------
//-------------------------------Use an external crystal oscillator and wait for the external crystal oscillator to start oscillating
RCC_HSEConfig(RCC_HSE_ON); //Configure external high-speed crystal oscillator
RCC_WaitForHSEStartUp(); //Wait for external high-speed crystal oscillator to start
//------------------------------------------------ ---------------
//----------------------------Use an external high-speed crystal oscillator as the PLL source and configure the PLL
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9); //PLL configuration
RCC_PLLCmd(ENABLE); //PLL enable
//------------------------------------------------ ---------------
//---------------------------------------------------Configure bus frequency
RCC_HCLKConfig(RCC_SYSCLK_Div1); //Set AHB clock
RCC_PCLK1Config(RCC_HCLK_Div2); //Set APB1 clock
RCC_PCLK2Config(RCC_HCLK_Div1); //Set APB2 clock
//------------------------------------------------ ---------------
//-------------------------------------------------System clock initialization
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //System clock initialization
//------------------------------------------------ ---------------
//-------------------------------------------Initialize the peripheral clock on the bus
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA
|RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC
|RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE
|RCC_APB2Periph_ADC1 | RCC_APB2Periph_AFIO
|RCC_APB2Periph_SPI1, ENABLE );
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4 | RCC_APB1Periph_USART2
|RCC_APB1Periph_USART3|RCC_APB1Periph_TIM2
, ENABLE );
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
}
I have always wanted to understand what is done in the RCC configuration. This time, through the study of this series of functions, I finally understood the clock configuration of the STM32 system and at what frequency the chip and peripherals work.