Study Notes--Atmeg16 External Interrupt

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Registers related to external interrupts:

MCU Control Register - MCUCR  The MCU Control Register contains interrupt trigger control bits and general MCU functions;

    7      5    4 3         1        0        SM2
    SE SM1   SM0   ISC11   ISC10   ISC01   ISC00

Four trigger modes of external interrupt:
ISCx1 ISCx0 Description   (x is 0, 1)
     0     An interrupt request is generated when INTx is low
     1     Any logic level change on the INTx pin will trigger an interrupt
     0     The falling edge of INTx generates an asynchronous interrupt request
     1     The rising edge of INTx generates an asynchronous interrupt request

Bit3, bit2, bit1, bit0 are the setting bits for interrupt 1 and 0 respectively;

 

MCU Control and Status Register - MCUCSR;

  6    5     3    2    1     0
JTD ISC2 – JTRF WDRF BORF EXTRF PORF

Bit6 – ISC2: Interrupt 2 trigger mode control bit

Asynchronous external interrupt 2 is activated by external pin INT2 if the I flag in the SREG register and the corresponding interrupt mask bit in the GICR register are set. If ISC2 is written as 0, the falling edge of INT2 activates the interrupt. If ISC2 is written as 1, the rising edge of INT2 activates the interrupt.

General Interrupt Control Register - GICR

       5    4    2       0
INT1 INT0 INT2 – – – IVSEL IVCE
Bit 7 – INT1: Enable external interrupt request 1,

Bit 6 – INT0: Enable external interrupt request 0,

Bit  5 – INT2: Enable external interrupt request 0


General Interrupt Flag Register - GIFR

         5      4   3   2   1   0
INTF1 INTF0 INTF2 – – – – –
Bit 7 – INTF1: External interrupt flag 1;

Bit  6 – INTF0: External interrupt flag 0;

Bit  5 – INTF2: External interrupt flag 2

Note that when entering certain sleep modes with the INT2 interrupt disabled, the input buffer for this pin will be disabled. This results in a logic change in the INTF2 flag setting signal.

      

                  INT0   INT1   INT2       Description

Rising edge trigger         Yes    Yes    Yes (asynchronous)
Falling edge trigger         Yes    Yes    Yes (asynchronous)
Any level change trigger   Yes    Yes    ---

Low level trigger         Yes    Yes    ---        (no interrupt flag)

Reference address:Study Notes--Atmeg16 External Interrupt

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