PIC16F 8-bit microcontroller assembly instruction set

      1. ADDWF f, d, add the contents of register f to register W. When d=1, the result is placed in register f. When d=0, the result is placed in register W. This affects the C, DC, and Z flags of STATUS. The status affected by this instruction is consistent with that of MCS51. When there is a carry, C=1. When there is a half carry, DC=1. Otherwise, the opposite is true. When the result is 0, the Z flag is set.
      2. ANDWF f, d, AND the contents of register f with register W. When d=1, the result is stored back to register f. When d=0, the result is stored to register W. This affects the Z flag of STATUS.
      3. CLRF (CLEAR File Register), clear the page register, and set the Z flag of STATUS.
      4. CLRW (CLEAR WREG), clear the W register, and set the Z flag of STATUS. This can be used equivalently with MOVLW 0H.
      5. COMF f, d, invert the contents of register f. When d=1, the result is stored in register f. When d=0, the result is stored in register W. This affects the Z flag.
      6. DECF f, d, the f register content is decremented by 1. When d=1, the result is stored in f; when d=0, the result is stored in w. The Z flag of STATUS is affected.
      7. DECFSZ f, d The f register content is decremented by 1. If it is 0, the result is skipped. If d=1, the result is stored in f register; if d=0, the result is stored in W register. The flag is not affected.
      8. INCF f, d, the f register content is incremented by 1. When d=1, the result is stored back to f; when d=0, the result
      is stored in W register. The Z flag is affected. 9. INCFSZ f, d, the f register content is incremented by 1. If the result is 0, the result is skipped. When d=1, the result is stored back to f; when d=0, the result is stored in W register. The flag is not affected.
     10. IORWF f, d, the f register content is ORed with the W register. When d=1, the result is stored back to f; when d=0, the result is stored in W register. The result affects the Z flag of STATUS.
     11. MOVF f, d, when d=1, the content of f register remains unchanged, and when d=0, the content of f register is copied to W register. When d=1, only the Z flag is changed, which can be used to determine whether the content of f register is 0.
     12. MOVWF, f (MOVE WREG to File Register), a very commonly used instruction, saves the content of W register to RAM
     13. NOP, nothing to say, just a no-op, but it is indeed a very commonly used statement, and short delay is necessary.
     14. RLF f, d, circular left shift instruction, the highest bit of f is moved to C, and the original content of C is moved to the lowest bit of f. It is consistent with the circular left shift instruction function of MSC51. The result affects the C flag.                                          
    15. RRF f, d, circular right shift instruction, the lowest bit of f is moved to C, and the original content of C is moved to the highest bit of f. It is consistent with the circular right shift instruction function of MCS51. The result affects the C flag.
    16. SUBWF f, d, fW The result is stored in d. When d=1, the result is stored in f, and when d=0, the result is stored in W. The instruction affects the C, DC, and Z flags of STATUS. When there is a borrow, C=0, and when there is a half borrow, DC=0; when there is no borrow or half borrow, the opposite is true. This is somewhat different from the MCS51 series of microcontrollers, so you need to pay attention when using it. When the two numbers are equal, Z=1.
     17. SWAWF f, d, byte exchange instruction, the high and low bytes of f are exchanged, and the result does not affect the flag. This instruction is very important in interrupt breakpoint saving and recovery, and only this instruction can be used. It will be introduced in the next article.
     18. XORWF f, d, the content of the f register is XORed with the W register. When d=1, the result is stored in f, and when d=0, the result is stored in W, affecting the Z flag of STATUS. I often use this instruction to compare whether it is equal to a number, using the principle of the same 0 and different 1. 
    19. BCF f, b, clear the b-th bit of the f register. The instruction does not affect any flag bit. The four bit operation instructions play an extremely important role in program design and are widely used.
    20. BSF f, b, set the b-th bit of the f register. The instruction does not affect any flag bit.
    21. BTFSCf, b, test the b-th bit of the f register. If it is 0, jump. The instruction does not affect any flag bit.
    22. BTFSS f, b, test the b-th bit of the f register. If it is 1, jump. The instruction does not affect any flag bit.
    23. ADDLW k, W plus the immediate number k, the result is in the W register, there is a carry, C, DC are 1 when half carry, otherwise 0; Z=1 when the result is 0.
    24. ANDLW k, W and the immediate number k are ANDed, the result is in the W register, affecting the Z flag bit.
   25. CALL k, call a subroutine, k is the entry address of the subroutine, does not affect any flag bit, but this instruction requires two instruction cycles to execute, because the current return address needs to be saved before jumping.
   26. CLRWDT Watchdog timer is cleared to 0, affecting the TO and PD flags of the STATUS register. Both flags are set.
   27. GOTO k, jump to the specified address, does not affect the flags. Two-cycle instruction.
   28. IORLW k, W register and immediate number k are ORed, the result is in the W register, affecting the Z flag.
   29. MOVLW k, immediate number k is assigned to the W register, does not affect the flags.
   30. RETFIE, interrupt return instruction, nothing to say. The last sentence of the interrupt service program.
   31. RETLW k, immediate number k is sent to the W register, the subroutine returns, this instruction is very special, and it is also quite interesting, and must be used for table lookup.
   32. RETURN, subroutine return instruction. 
   33. SLEEP, enter sleep mode. Affects the TO and PD flags of STATUS, TO=1, PD=0. 
   34. SUBLW, k, the immediate value is subtracted from W, the result is in the W register, the flag bit is affected in the same way as the SUBWF instruction, and will not be described in detail.
   35. XORLW k, the immediate value k is XORed with the W register, the result is in the W register, and the Z flag bit is affected.