LPC2148 storage test ARM7 wireless transmission

introduction

    The storage test technology ^[1] method is an effective method for recording the parameters of moving objects under special conditions. It first stores the test data in the memory, and then communicates with the host computer through a specific interface after the device is recovered to restore the data information. In many consumer electronic products, higher requirements are placed on the real-time performance and power consumption of the data acquisition storage system. Not only must it meet the requirements of low power consumption and miniaturization design, but it must also reflect the changes in the field collected data in real time. In this way, higher requirements must be placed on the sampling rate, power consumption, etc. of the system. With the development of semiconductor technology, various technological advances have made it possible to realize high-speed, low-power data acquisition systems.

   This paper mainly uses NXP's 16/32-bit microcontroller LPC2148 ^[2-3] as the core control component, and combines it with nRF24L01 [4] to achieve data collection, storage and transmission.

1 System Principle

The entire test system consists of an analog adapter circuit, an external crystal oscillator, a microcontroller, a memory module, a power management module, a wireless transceiver module, and an interface circuit, as shown in Figure 1.

Figure 1 System block diagram

1.1 Power Module

The design of the power module is the core part of realizing power saving of the whole system. That is, the power supply only needs to supply power to each circuit module when it is needed, and cut off the power when it is not needed to reduce the ineffective power consumption of the system. A single battery power supply can be used to realize multi-branch power network management, so that the power supply of each module of the system is relatively independent. However, at this time, attention should be paid to the compatibility of the live and non-live parts.

1.2 Analog Adaptation Circuit

Since the signal measured by the sensor is very weak, it needs to be properly amplified, filtered and corrected before a series of processing can be performed.

1.3 Microcontroller

This test system uses NXP's 16/32-bit microcontroller LPC2148 as the core control element. It has a built-in 10-bit A/D converter, and no external A/D converter is required, which can reduce the size and save costs. At the same time, it also has two power-saving modes: power-down mode and idle mode. Reasonable design can reduce system power consumption.

1.4 Interface circuit and wireless transceiver

This test system has two methods to communicate with the host computer. One is through the wireless transceiver module nRF24L01, and the other is through a specific interface circuit. In this way, even if an error occurs in the wireless transmission part, data can be recovered afterwards.

2 Introduction to the hardware and software of the main parts of the system

2.1 Development of internal A/D converter

LPC2148 has two 10-bit successive approximation analog-to-digital converters inside, and 8 pins are multiplexed as input pins (ADC0 and ADC1). It has a power-down mode, a measurement range of 0 V~VREF, a 10-bit conversion time ≥2.44 μs, and a burst conversion mode with one or more inputs. The conversion can be triggered by input jump or timer match signal. Its basic clock is provided by the VPB (VLSI peripheral bus) clock. Each converter contains a programmable divider that can adjust the clock to 4.5 MHz (maximum) required for the successive approximation conversion. 11 such clocks are required for the conversion that fully meets the accuracy requirements. This article uses the I/O port of LPC2148 to implement it, uses channel 3 of the ADC module to measure the voltage, defines I/O port P0.30 as AD0.3, samples the voltage through the arrival of the timer interrupt, and sets the ADC register as follows:

AD0CR=（1<<3）| //SEL=8, select channel 3

((Fpclk/10000001)<<8)| //CLKDIV= Fpclk/10000001, conversion clock is 1 MHz

(0<<16) | //BURST=0, software control conversion operation

(0<<17) | //CLKS=0, use 11clock conversion

(1<<21) | //PDN=1, normal working mode

(0<<22) | //TEST1:0=00, normal working mode

(1<<24) | //START=1, directly start A/D conversion

(0<<27) | //This bit is invalid when directly starting A/D conversion

DelayNS(10);

ADC_Data = AD0DR; //Read the A/D conversion result and clear the DONE flag

while(1){

AD0CR|=1<<24; //Perform the first conversion

while ((AD0STAT & 0x80000000) == 0); //Wait for the conversion to end

AD0CR|=1<<24; //Start conversion again

while ((AD0STAT & 0x80000000) == 0); //Wait for the conversion to end

ADC_Data = AD0DR; //Read A/D conversion result

}

2.2 Communication between SPI and nRF24L01 module

SPI is a full-duplex serial interface. It is designed to handle multiple interconnected masters and slaves on a given bus. In a given data transfer, only one master and one slave can communicate on the interface. In a data transfer, the master always sends 8 to 16 bits of data to the slave, and the slave always sends one byte of data to the master. Figure 2 shows the timing of the four different data transfer formats of SPI.

Figure 2 SPI data transmission format [page]

When setting registers, pay attention to the difference between CPOL being 0 and 1 and the relationship between SSEL and CPHA.

Part of the code for SPI initialization is as follows:

void MSIP_Init(void) {

PINSEL0 = (PINSEL0 & (~ (0xff << 8))) | (0x55 << 8); // Set the pin to connect to SPI

SPCCR=0x52; //Set SPI clock division

SPCR=（0<<3）| //CPHA=0, data is sampled at the first clock edge of SCK

(1<<4)| //CPOL=1, SCK is low valid

(1<<5) | //MSTR=1, SPI is in master mode

(0<<6) | //LSBF=0, SPI data transmission MSB (bit 7) first

(0<<7); //SPIE=0, SPI interrupt is disabled

}

Figure 3 Interface circuit

The interface circuit between embedded microcontroller and NRF24L01 is shown in Figure 3.

These 8 pins are connected to the GPIO port of the microcontroller respectively, and the microcontroller is set to the corresponding function during initialization. GND is the power ground; VDD is the positive power supply 1.9~3.6 V output; CE is the selection of the working mode, RX or TX mode; SS is the SPI chip select enable, low level enable; SCK is the SPI clock; MOSI is the SPI input; MISO is the SPI output; IRQ is the interrupt output.

The receiving end code is as follows:

#include "NRF24L01.h"

unsigned int RxBuf[5]; //Receive buffer, save received data

int main() {

NRF24L01_Initial(); //nRF24L01 initialization

while ((nRF24L01_RxStatus()) != 1) { //nRF24L01 has no data request

*P_Watchdog_Clear=0x0001;

}

NRF24L01_ReceiveByte(RxBuf); //Receive data

while(1){

*P_Watchdog_Clear=0x0001;

}

}

3 Experimental Data and Verification

FIG4 shows two experimental curves measured by the test system. The curve measures the voltage of the fuze battery [8]. The curve can be divided into two parts, one part is that the battery voltage increases with time, and the other part is that the voltage remains unchanged with time. This is due to the special structure of the fuze.

After experimental verification, it is shown that this test system can meet the measurement accuracy requirements within the allowable error range, thereby verifying that this test system has strong applicability.

4 Outlook

Future embedded products will be devices that are closely integrated with software and hardware. To reduce power consumption and costs, designers need to simplify the system kernel as much as possible, retaining only the software and hardware that are closely related to the system functions, and use the minimum resources to achieve the most appropriate functions. They usually have the characteristics of low power consumption, small size, and high integration [9]. Embedded systems are organically combined with specific applications, and their upgrades are also carried out simultaneously with specific products. Therefore, once embedded system products enter the market, they have a long life cycle and huge market potential.

Figure 4 Experimental curve

references

[1] Zu Jing, Shen Xiangnan, Zhang Wendong. Storage test technology[J]. Acta Armamentarii Sinica, 1995(2).

[2] Zhou Ligong, et al. A Simple Introduction to ARM7 - LPC213x/214x[M]. Beijing: Beijing University of Aeronautics and Astronautics Press, 2005.

[3] Zhou Ligong, et al. ARM Embedded System Basic Tutorial [M]. Beijing: Beijing University of Aeronautics and Astronautics Press, 2005.

[4] nRF2401 and SPI interface [EB/OL]. [20080218]. http://www.freqchina.com/SPI%20interface.pdf.

[5] ARM. ARM Developer Suite_CodeWarrior IDE Guide, 2000.

[6] ARM Corporation. ARM Developer Suite_Compliers and Libraries, 2000.

[7] ARM Corporation. ARM Developer Suite_Assembler Guide, 2000.

[8] Wang Yingche, Tian Yu, Zhu Yapeng. Application of lead-acid storage battery in non-rotating projectile fuze[J]. Journal of Detection and Control, 2008, 30(5):5256.

[9] http://baike.baidu.com/view/6115.htm?fr=ala0_1_1.

Sun Tingting (Master's student), Ma Tiehua (Professor and doctoral supervisor), and Shen Dawei (Lecturer), their main research directions are dynamic testing and intelligent instruments.