STM32 hardware structure learning

Publisher:tgdddtLatest update time:2013-02-22 Source: 21icKeywords:STM32 Reading articles on mobile phones Scan QR code
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stm32 hardware learning account ---- power supply

Classification:

1. Working power 2. Backup domain power 3. ADC power supply reference power

Working power supply 2-3.6v

The backup domain power supply is used for RTC clock module and backup domain register preservation

ADC power supply reference power supply: To improve accuracy, ADC has a separate working power supply and reference power supply reference

Note that only STM32s with more than 100 pins have ADC reference power supply references. ADC reference power supply references below 100 pins are internally connected to the ADC power supply

In addition, there is an internal 1.8, provided by the chip's internal regulator.

stm32 hardware learning account ---- clock

STM32 has multiple clock sources:

1. External high-speed clock HSE can be composed of an external input clock signal or an external crystal oscillator.

2. Internal high-speed clock SHI, frequency is 8M, accuracy is 1%

3. External low-speed clock source LSE, connected to 32768Hz crystal, provides high-precision clock for RTC

4. Internal low-speed clock LSI 32k Hz, providing clock for watchdog unit and automatic wake-up unit

Among them, HSE and HSI can be used directly as system clocks, or provide system working clocks through PLL multiplication.

Notice:

HSI is used as PLL input, and the maximum clock that PLL can output is only 64MHz

stm32 hardware learning account-system storage structure

The program memory, data memory, registers and IO ports of stm32 are organized into a 4GB linear space.

The addressable storage space is divided into eight 512M main blocks.

The stm32 storage encoding format is little endian encoding format.

The embedded SRAM can be accessed in word, half-word, or byte mode, starting at address 0x2000000.

The bit segment of stm32 is an alias mechanism, which maps a certain byte or bit of the user data storage space to the alias space starting at 0x22000000.

For example, the second bit in 0x20000030 is mapped to:

0x22000000+0x30*32+2 = 0x22000602

Writing to 0x22000602 is a read-modify-write of the bit 0x20000030.

The flash memory of stm32 is physically divided into main blocks and information blocks. The main block is 16K*64 bits, and each main block is divided into 128 pages of 1KB.

The information block size is 258*64 bits, each information block is divided into 2 pages + 16B, each page size is 2KB

stm32 hardware learning account-debugging interface

STM32 supports two debugging ports: jtag interface and swd serial debug interface.

The swd debug port only occupies two lines, swdio and swclk.

Compared with jtag, more pins are available.

And a smaller size debug socket can be used.

JILINK V7 supports SWD interface.

The default interface of stm32 is jtag when it is powered on.[page]

When using the swd interface, the redundant jtag interface IO ports need to be remapped to general IO ports

stm32 hardware learning account ---- reset

stm32 reset is divided into: system reset, power reset, backup domain reset

A system reset resets all registers except the reset flag of the clock control register and the backup domain register.

System reset is caused by NRST pin low level, window watchdog and independent watchdog, software reset and low power management reset.

Power reset is caused by both power-on/power-down reset (POR and PDR) and exit from standby mode.

A power reset will reset all registers except the backup domain registers.

The backup domain reset is caused by two reasons: software backup domain reset and power backup domain reset.

Power backup domain reset refers to a reset caused by a sudden power-on when both VDD and Vbat are powered off.

The reset vector location is 0x00000004

stm32 hardware learning account-main electrical characteristics

STM32 supply voltage - 0.3---4.0v.

Some pins of stm32 have 5v tolerance characteristics, and their voltage input range is vss-0.3 to 5.5v

The supply voltage range of other pins is: vss-0.3v to vdd+0.3v

Flash wait cycle:

0-24MHz 0 wait states

24-48MHz 1 wait state

2 wait states above 48MHz

Running the code in flash, the current is 50.3mA when all peripherals are enabled at 72MHz, and 32.9mA when all peripherals are disabled.

The maximum total current of VDD pin IVDD is 150mA.

The maximum total current of VSS pin IVSS is 150mA.

The maximum current of IO pin is 25mA and -25mA.

Flash erase and write times minimum 10,000 times

Flash data/commands are stored for at least 20 years

Weak pull-up/weak pull-down equivalent resistance 40k ohms.

The typical current value of GPIOs pin input and output is 8mA.

stm32 hardware learning account----GPIO

The GPIO of stm32 can be configured by software as:

Input floating, input pull-up, input pull-down,

Analog Input

Open drain output, push-pull output,

Open-drain multiplexing, push-pull multiplexing.

After stm32 is reset, the IO port is in the input floating state.

After the JTAG pin is reset, it is in the pull-up or pull-down state.

All IO ports have external interrupt capability. The port must be configured in input mode to use the external interrupt function.

IO port multiplexing function configuration:

For alternate function input, the port can be configured as any input mode or alternate function output mode.

For alternate function output, the port must be configured as alternate function output

For bidirectional multiplexing function, the port must be configured as multiplexing function output

The multiplexing functions of some IO ports of stm32 can be remapped to other multiplexing functions.

STM32 has a GPIO lock mechanism, which locks the GPIO configuration and cannot be modified before the next reset.

When the LSE oscillator is turned off, OSC32_IN and OSC32_OUT can be used as general purpose IO PC14 and PC15.

When entering standby mode or the backup domain is powered by Vbat, the PC14 and PC15 functions are lost, and the two IO lines are set to analog input functions.

OSC_IN and OSC_OUT can be remapped to GPIO PD0, PD1.

Note that PD0 and PD1 can only be used in 50MHz output mode when used as output ground.

Note: PC13, PC14, PC15 can only be used in 2MHz output mode, can only carry a maximum load of 30pf, and can only use one pin at a time!

Keywords:STM32 Reference address:STM32 hardware structure learning

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