Introduction to the importance of single chip microcomputer in the steering control system of small automatic airship

　　introduction

　　A stratospheric airship is an aircraft that uses lighter-than-air gas (such as helium) to generate buoyancy as lift to fly in the stratosphere. It relies on the static lift generated by the lighter-than-air gas loaded inside the airship, and controls the control surfaces and power devices on the airship to achieve flight in the stratosphere with less energy consumption. The small self-controlled airship is a small soft test airship designed to verify the flight characteristics and control performance of the stratospheric airship. The study of its control system is an important transitional stage in the development of stratospheric airships and is of great significance.

　　1 Introduction to the rudder control system of small autonomous airship

　　The servo is the most important executive component in the actuator of a small self-controlled airship. Whether the servo can be controlled quickly and accurately is directly related to the autonomous control effect of the airship. Therefore, the rudder control system has become one of the most important components in the autonomous flight control system of a small airship. Its main function is to receive the control instructions issued by the onboard computer, realize the collection, analysis and processing of the control instructions, and output continuously adjustable rudder control signals to the servo according to the control instructions, so as to control the servos on the boat to complete the predetermined actions.

　　2. Rudder control system hardware design

　　The airship rudder control system is based on multiple P89C2051 single-chip microcomputers, and cooperates with power modules, driver chips and multi-way conversion switches to achieve the desired functions on a printed circuit board.

　　The main control chip of the rudder control system (main control microcontroller 1, 2) is a P89C51RA2xx microcontroller, which has 8KB of parallel programmable non-volatile FLASH program memory and can be serially programmed in the system (ISP) and in the application (IAP). This type of microcontroller is a derivative of the 80C51 microcontroller. It is an 8-bit microcontroller manufactured using advanced CMOS technology and has the same instruction system as the 80C51. The device has 4 groups of 8-bit I/O ports, 3 16-bit timers and counters, multiple interrupt sources-4 interrupt priorities-nested interrupt structure, 1 enhanced UART, on-chip oscillator and timing circuit. The rudder control microcontroller uses the Atmel 89C2051 microcontroller [2], and its specific performance is not described here.

　　The power module uses the LM2576 series produced by National Semiconductor, which is a substitute for linear three-terminal voltage regulators (such as the 78xx series of three-terminal voltage regulator integrated circuits). In comparison, it has lower heat loss, higher working efficiency, stronger output current driving ability, and a strong inhibitory effect on high-frequency interference of the power supply. This device only requires very few peripheral devices to form an efficient voltage regulator circuit, providing a strong guarantee for the stable and reliable operation of the MCU.

　　In addition, in order to enhance the signal driving capability, 74LS245 is used as the signal driving chip before output; the Max232 chip is used for serial port level conversion.

　　The hardware design of this system is relatively simple. It is worth mentioning the safety design part. That is, when the ground detects that the automatic control system on the boat has failed, in order to ensure the safe return of the airship, the control mode needs to be switched to the remote control mode. As shown in Figure 1, when the onboard computer fails, the rudder control system receives the ground remote control signal through the wireless radio frequency receiver, and directly controls the onboard rudder through the multi-channel PWM wave output by it, so as to control the airship to return safely. Here, the control mode conversion is realized by a multi-way conversion switch, and the switching signal of the switch is given by the onboard computer watchdog circuit when it detects that the onboard computer is no longer working properly.

　　3 Rudder control system software design

　　3.1 Overall software structure

　　All microcontroller programs of the rudder control system are written in C language under Keil C51 environment. In order to ensure the real-time and rapid performance of the system, the software writing adopts the structure of main program + task + interrupt.

　　In the three-part program, the main single-chip microcomputer 1 has the most external interrupts, including serial port interrupts, handshake interrupts with the main single-chip microcomputer 2, and external interrupts of the onboard computer watchdog. The priority of these interrupts is: onboard computer watchdog interrupt > serial port interrupt > handshake interrupt. After the main single-chip microcomputer 1 receives the information frame sent by the onboard computer through the RS232 serial port, it first performs frame recognition, extracts the first m bytes of data, adds the frame header and frame tail, and sends it to the main single-chip microcomputer 2 through the P1 port; and outputs the m+1th byte of data as a switch channel control signal through the P2 port for system control backup.

　　The main task of the main MCU 2 program is to receive data from the upper computer through its P1 port, extract various control information, add the address in front of the corresponding control instruction, and send it to the lower rudder control MCU through the serial port in turn.

　　The main task of the rudder control microcontroller is to identify control instructions and address instructions, and generate PWM waves to control the rudder on the boat according to the received control instructions (rudder duty cycle signal).

　　The key issues in the system software design include the following aspects: (1) the reception and identification of data frames in the control signal process; (2) the multi-machine communication between the master and slave microcontrollers in the rudder control system; (3) the software generation method of PWM wave rudder control signal. The following is a detailed explanation of these issues and the corresponding solutions.

　　3.2 Key Issues in Software Design

　　(1) Serial port reception and identification technology of data frames

　　In the steering control system, data is transmitted in the format of binary information frames. Each information frame has a fixed frame header and frame footer starting from the header, and has a fixed length. Its basic data format is shown in Table 1.

　　In the design of the rudder control system, serial communication plays an important role, such as the communication process between the onboard computer and the main single-chip microcomputer 1. The following takes the serial port receiving program of the main single-chip microcomputer 1 as an example to illustrate the implementation process of serial communication.

　　In serial communication, the task of the receiving program is data reception, frame recognition and information extraction. The conventional design method is to set a relatively large buffer. The serial receiving interrupt service program is responsible for pushing the received data into the buffer. When the data in the buffer is large enough, the main program calls a frame recognition and decoding subroutine to process the data in the buffer. The advantage of this method is that the interrupt service program is relatively short. The disadvantage is that it takes a long time from the completion of receiving a frame of data to decoding. In addition, managing the buffer requires a lot of CPU time, so the real-time performance is poor, so it is not suitable for use here. [page]

　　This paper adopts the interrupt service program on-site frame recognition technology, that is, the buffer is omitted, and data reception and frame recognition are completed by the interrupt service program, and then the data extraction and processing are completed in the loop of the main program. The implementation mechanism of the on-site frame recognition technology is as follows: the interrupt service program is regarded as a processor. The serial data arrives byte by byte. The program first waits for the first frame header from the data sequence, writes it into the storage array of the frame, and sets the flag flag1 at the same time, and the receiving state advances one step; then judge whether the incoming data meets the characteristics of the second frame header at the next interrupt. If it meets the requirements, it is stored in the corresponding array, and the corresponding flag flag2 is set, and the receiving state continues to advance; if both bytes of the frame header meet the requirements, the subsequent data will be stored in the specified array in sequence; according to the number of bytes received, when the data part that meets the frame is received, it is judged whether the next byte is the first byte of the frame end, and if it is, the flag flag3 is set; then the second byte of the frame end is judged according to the same method. If it has been received, the flag flag4 that the frame data has been completely received is set, and the receiving state is reset to zero, and the waiting for the frame header character starts again. During the frame header and frame tail judgment, if one item does not meet the requirements, the receiving state will be reset to zero to restart the waiting for the frame header. The main program will judge the "frame complete received" flag once every cycle. If it is true, the corresponding data extraction subroutine will be called and flag4 will be cleared.

　　The serial interrupt service program flow is shown in Figure 2. The advantage of using the interrupt service program on-site frame recognition technology is that frame recognition is performed immediately after data is received, eliminating the need for buffer management and reducing the number of accesses, thereby saving a lot of time and greatly improving the real-time performance of the receiving program. At the same time, wrong frames and broken frames are automatically discarded and no longer occupy resources.

　　The meaning of each flag bit in Figure 2 is:

　　flag1——received frame header Head1 flag;

　　flag2——the complete frame header flag is received;

　　flag3——End1 flag at the end of the frame is received;

　　flag4——complete frame received flag.

　　(2) Single-chip multi-machine communication

　　In the design of the steering control system, the communication between the various parts is an important part of the design, which mainly includes the communication between the single-chip microcomputer and the upper PC and the communication between the single-chip microcomputers. In the steering control system, the communication between the main single-chip microcomputer 1 and the upper PC is completed through the asynchronous serial communication interface of the single-chip microcomputer; and the main single-chip microcomputer 1 transmits data to the main single-chip microcomputer 2 through its P1 port. I will not go into details here, but focus on how the main single-chip microcomputer 2 transmits instructions to multiple lower-level steering control single-chip microcomputers through its serial port.

　　In this system, the main MCU 2 is the host, and the m rudder control MCUs are slaves. In the communication process between the host and the slaves, the SM2 bit in the serial port control register SCON plays an important role. When the SM2 bit of one of the rudder control MCUs (89C2051) is 1, the MCU only receives the address frame and ignores the data frame; when the SM2 bit is 0, the MCU receives all the messages sent. The specific communication process is as follows:

　　① First, select the master and slave microcontroller working mode as mode 3, and set the SM2 bit of all slaves to 1, which means they are in the state of only receiving address frames.

　　②The host receives the data frame sent by the main single-chip computer 1, extracts the data part from it (the m-byte instruction corresponds to the m rudder control single-chip computers), and adds a byte of address information before the control instruction byte according to the sequence number. Then the host sends the address byte and data byte of each rudder control single-chip computer through the serial port in turn. Sending a frame of address information contains an 8-bit address, and the 9th bit is 1, indicating that the frame sent is an address frame.

　　③ After receiving the address frame, the slave enters an interrupt and compares the sent address with itself; the slave with the same address is the addressed slave, it clears the SM2 bit and receives all subsequent frame information (data information) sent by the host. All other unaddressed slaves still maintain SM2=1 and ignore the data frame sent by the host until a new address frame is sent; then, at the next interrupt, the addressed slave receives the data information sent by the host (the 9th bit is 0).

　　It should be noted that if an address frame is sent to an already addressed slave, SM2 of the slave will be 1, and the initial state will be restored to compete with other slaves.

　　3.2 Key Issues in Software Design

　　(1) Serial port reception and identification technology of data frames

　　In the steering control system, data is transmitted in the format of binary information frames. Each information frame has a fixed frame header and frame footer starting from the header, and has a fixed length. Its basic data format is shown in Table 1.

　　In the design of the rudder control system, serial communication plays an important role, such as the communication process between the onboard computer and the main single-chip microcomputer 1. The following takes the serial port receiving program of the main single-chip microcomputer 1 as an example to illustrate the implementation process of serial communication.

　　In serial communication, the task of the receiving program is data reception, frame recognition and information extraction. The conventional design method is to set a relatively large buffer. The serial receiving interrupt service program is responsible for pushing the received data into the buffer. When the data in the buffer is large enough, the main program calls a frame recognition and decoding subroutine to process the data in the buffer. The advantage of this method is that the interrupt service program is relatively short. The disadvantage is that it takes a long time from the completion of receiving a frame of data to decoding. In addition, managing the buffer requires a lot of CPU time, so the real-time performance is poor, so it is not suitable for use here. [page]

　　This paper adopts the interrupt service program on-site frame recognition technology, that is, the buffer is omitted, and data reception and frame recognition are completed by the interrupt service program, and then the data extraction and processing are completed in the loop of the main program. The implementation mechanism of the on-site frame recognition technology is as follows: the interrupt service program is regarded as a processor. The serial data arrives byte by byte. The program first waits for the first frame header from the data sequence, writes it into the storage array of the frame, and sets the flag flag1 at the same time, and the receiving state advances one step; then judge whether the incoming data meets the characteristics of the second frame header at the next interrupt. If it meets the requirements, it is stored in the corresponding array, and the corresponding flag flag2 is set, and the receiving state continues to advance; if both bytes of the frame header meet the requirements, the subsequent data will be stored in the specified array in sequence; according to the number of bytes received, when the data part that meets the frame is received, it is judged whether the next byte is the first byte of the frame end, and if it is, the flag flag3 is set; then the second byte of the frame end is judged according to the same method. If it has been received, the flag flag4 that the frame data has been completely received is set, and the receiving state is reset to zero, and the waiting for the frame header character starts again. During the frame header and frame tail judgment, if one item does not meet the requirements, the receiving state will be reset to zero to restart the waiting for the frame header. The main program will judge the "frame complete received" flag once every cycle. If it is true, the corresponding data extraction subroutine will be called and flag4 will be cleared.

　　The serial interrupt service program flow is shown in Figure 2. The advantage of using the interrupt service program on-site frame recognition technology is that frame recognition is performed immediately after data is received, eliminating the need for buffer management and reducing the number of accesses, thereby saving a lot of time and greatly improving the real-time performance of the receiving program. At the same time, wrong frames and broken frames are automatically discarded and no longer occupy resources.

　　The meaning of each flag bit in Figure 2 is:

　　flag1——received frame header Head1 flag;

　　flag2——the complete frame header flag is received;

　　flag3——End1 flag at the end of the frame is received;

　　flag4——complete frame received flag.

　　(2) Single-chip multi-machine communication

　　In the design of the steering control system, the communication between the various parts is an important part of the design, which mainly includes the communication between the single-chip microcomputer and the upper PC and the communication between the single-chip microcomputers. In the steering control system, the communication between the main single-chip microcomputer 1 and the upper PC is completed through the asynchronous serial communication interface of the single-chip microcomputer; and the main single-chip microcomputer 1 transmits data to the main single-chip microcomputer 2 through its P1 port. I will not go into details here, but focus on how the main single-chip microcomputer 2 transmits instructions to multiple lower-level steering control single-chip microcomputers through its serial port.

　　In this system, the main MCU 2 is the host, and the m rudder control MCUs are slaves. In the communication process between the host and the slaves, the SM2 bit in the serial port control register SCON plays an important role. When the SM2 bit of one of the rudder control MCUs (89C2051) is 1, the MCU only receives the address frame and ignores the data frame; when the SM2 bit is 0, the MCU receives all the messages sent. The specific communication process is as follows:

　　① First, select the master and slave microcontroller working mode as mode 3, and set the SM2 bit of all slaves to 1, which means they are in the state of only receiving address frames.

　　②The host receives the data frame sent by the main single-chip computer 1, extracts the data part from it (the m-byte instruction corresponds to the m rudder control single-chip computers), and adds a byte of address information before the control instruction byte according to the sequence number. Then the host sends the address byte and data byte of each rudder control single-chip computer through the serial port in turn. Sending a frame of address information contains an 8-bit address, and the 9th bit is 1, indicating that the frame sent is an address frame.

　　③ After receiving the address frame, the slave enters an interrupt and compares the sent address with itself; the slave with the same address is the addressed slave, it clears the SM2 bit and receives all subsequent frame information (data information) sent by the host. All other unaddressed slaves still maintain SM2=1 and ignore the data frame sent by the host until a new address frame is sent; then, at the next interrupt, the addressed slave receives the data information sent by the host (the 9th bit is 0).

　　It should be noted that if an address frame is sent to an already addressed slave, SM2 of the slave will be 1, and the initial state will be restored to compete with other slaves.