ARM-based 32-bit MCU provides SoC design reference

Publisher:雅致人生Latest update time:2012-10-25 Source: 21IC Keywords:ARM  MCU  SoC Reading articles on mobile phones Scan QR code
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With the rapid development of manufacturing technology, MCU has made great progress in peripheral integration, performance, power consumption and cost reduction, and can almost provide performance similar to SoC, and the number of applications is increasing. In particular, ARM-based 32-bit MCU provides SoC designers with a fast and low-cost design reference.

System-on-Chip (SoC) technology can be seen as a new design model for Application-Specific Integrated Circuits (ASIC). Compared with ASIC, its design cycle is shorter and can eliminate the obstacles encountered by designers when designing special applications. The performance of SoC is close to that of mature ASIC, but it still requires masks and cannot save most of the design costs required by ASIC.

As advanced manufacturing processes integrate more peripherals into chips, reduce power consumption and provide more performance, the difference between ASICs and standard 32-bit microcontrollers (MCUs) is also shrinking. For microcontrollers based on ARM cores, this trend is even more obvious when key peripherals are integrated. For example, MCUs using 0.18 μm flash memory processes and supporting high-performance architectures provide a lot of design help for SoC designers.

Performance expansion

To make up for the lack of performance, the ARM-based LPC213X series microcontrollers use up to four 32-bit parallel instructions, which means that the 20 MHz or 30 MHz memory controller no longer requires the CPU to wait for instructions. ARM's pipeline architecture enables this technology to provide nearly 4 times the performance of other implementation methods.


Peripherals

The application determines which peripherals are integrated on the chip. Microcontroller families also integrate various peripherals for different applications. A complete microcontroller family can meet a variety of applications, such as robotics, water and electricity meters, contactless card readers, production equipment control, environmental control and high-voltage AC systems (HVAC), medical equipment and security systems. The LPC213X series supports the above applications by integrating 32K to 512K bytes of on-chip flash memory, several 32-bit timers, pulse width modulation (PWM), general communication interfaces such as UART, SPI/SSP and I2C, single or dual 10-bit 8-channel ADC and 10-bit DAC peripherals. The architectural block diagram of the LPC231X series is shown in Figure 1.

A wide range of communication interfaces and on-chip SRAM (8K, 16K and 32 Kbytes) make the chip a strong candidate for gateways and protocol converters, software modems, voice recognition and low-end imaging devices.


Power and size considerations

The most effective design technique for optimizing microcontroller power is to use a real-time clock to control the core processor. In this way, the phase-locked loop (PLL) can be inhibited to control the speed of the processor. Another feature of the LPC213X series is the management of peripherals, reducing their speed or shutting them down completely.

Thanks to the use of advanced manufacturing processes, the ARM-based microcontroller series provides pin-compatible small packages. Table 1 shows the package form of the LPC213X series and the above-mentioned optional peripherals.


Function Introduction

The simplified architecture block diagram of the LPC213X series is shown in Figure 2. The important functional features are introduced one by one below.

On-chip program flash memory

Programming of the Flash system can be accomplished in several ways. The serial port can be used for in-system programming. It can also erase or write the application while it is running, which provides the flexibility needed for field firmware upgrades. When the on-chip bootloader is used, the Flash is available for user code.

Power Control

The LPC213X series supports the following two reduced power modes:

Idle mode. In this mode, instructions stop running. Reset or interrupt resumes instruction execution. This mode eliminates power consumption of the processor, memory system, related controllers, and internal buses. Peripherals that continue to run can generate interrupts to tell the processor to execute instructions again. [page]

Power-down mode. In this mode, the oscillator is switched off and the chip receives no internal clock. Since dynamic operation is suspended, the power consumption is almost zero. However, in Power-down mode, the state and registers of the processor, peripheral registers and internal SRAM values ​​are not affected. The logic level of the chip output pins remains static. This mode can be terminated by a reset or a specific interrupt that can operate without a clock.

In addition, the LPC213X series can also shut down unused peripherals.

Pulse Width Modulation

The PWM module is a module based on a standard timer. The timer can calculate the period of the peripheral module and generate an interrupt or perform other operations when a specific timer value is reached. It can control the rising and falling edges separately, thus expanding the application range. For example, multi-phase motor control requires 3 non-overlapping PWM outputs to control 3 pulse widths and positioning separately.

Two match registers are used to implement a single edge controlled PWM output. One match register resets the count value when a match occurs, which is used to control the PWM cycle speed; the other is used to control the PWM edge positioning.

Only one match register is required for each additional single-edge controlled PWM output. Three match registers can provide dual-edge control for the PWM outputs.

For dual edge controlled PWM outputs, special match registers control the rising and falling edges of the outputs. This allows positive PWM pulses (rising edge occurs before falling edge) and negative PWM pulses (falling edge occurs before rising edge) to run simultaneously.

Interrupt Controller

The Vectored Interrupt Controller (VIC) handles all interrupt requests and classifies them as Fast Interrupt Request (FIQ), Vectored Interrupt Request (IRQ) or Non-Vectored IRQ. Since the allocation mode is programmable, the interrupt priority from the peripherals can be dynamically allocated and adjusted.

FIQ has the highest priority. If more than one request is divided into FIQ, VIC will collect these requests and input the FIQ signal to the ARM processor. In this way, the FIQ service program can read the command from VIC to determine which FIQ source or sources are requesting an interrupt.

Vector IRQ has medium priority. Up to 16 interrupt requests can be assigned as IRQ. Any interrupt request can be assigned to any of the 16 vector IRQ channels (slots). Channel 0 has the highest priority and channel 15 has the lowest priority.

Non-vectored IRQs have the lowest priority. Typically, the VIC provides a service routine address for the highest priority IRQ being requested, or a shared default routine address for all non-vectored IRQs. This default routine reads another VIC register to determine which IRQs are active.

UART and I/O Controller

In addition to the standard transmission and functions, some series have a modem control signal handshaking interface in both UARTs.

Each microcontroller has two I2C bus controllers. I2C provides a specific address for each device, allowing the device to operate in receive-only or transmit-only mode. Devices can be divided into two types: master and slave. The I2C bus can be controlled by more than one bus master, and some support transfer rates up to 400 kb/s.

The device also integrates an SPI controller and an SSP controller. The SPI can handle multiple master-slave operations, and its maximum data bit rate is 1/8 of the input clock rate. The SSP controller can interact with multiple master-slave operations, but only one master-slave combination can communicate during a specific data transfer.


Conclusion

In the past few years, standard microcontrollers have made great progress in performance, power consumption and feature combination, while maintaining a low unit cost. Although microcontrollers cannot provide the same performance as SoCs, they can provide sufficient performance similar to SoCs, and the number of applications is growing. Therefore, in addition to its original market, 32-bit microcontrollers, especially those based on ARM cores, can help SoC designers quickly bring products to market at a low cost.

Keywords:ARM  MCU  SoC Reference address:ARM-based 32-bit MCU provides SoC design reference

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