Design of six-phase traffic signal based on ARM

0 Introduction
With the rapid development of urbanization in China, the problem of road traffic congestion is becoming increasingly serious. As one of the important means to alleviate the problem of traffic congestion, the core controller of traffic signal mainly includes two categories: one is the single-chip microcomputer controller, which is based on 8/16-bit single-chip microcomputer, with simple functions and single control mode; the other is the industrial computer controller, which is powerful, but complex in structure, redundant and costly. In terms of phase control, traditional traffic signal mainly adopts two-phase and four-phase signal control. In two-phase control, the straight direction and left turn direction are released at the same time, and the left-turning vehicle conflicts with the oncoming straight-going vehicle, which is very likely to cause traffic accidents; in four-phase control, the right turn direction is treated as a normal state, which obviously ignores the requirement of pedestrian safety in the absence of overpasses or underground passages.
In view of the defects of the above-mentioned traditional traffic signal, this paper proposes a system control scheme and software and hardware design method of a six-phase traffic signal based on the ARM chip LM3S8962.

1 Six-phase signal control scheme
The control scheme of the signal is an ordered set of phase setting, phase sequence setting, and signal timing. It is the data source of the signal operation. Therefore, the study of the signal control scheme is extremely important.
1.1 Six-phase model of plane intersection
This paper considers the left turn direction and the right turn direction separately, and divides the signal phase of the intersection into 6 phases, as shown in Figure 1. Among them, phases 1, 3, 4, and 6 are used for motor vehicles, and phases 2 and 5 are used for motor vehicles, non-motor vehicles, and pedestrians. It can be seen from the model that only two diversion points are generated when phases 1 and 4 are released, and no contact points are generated when the remaining phases are released. Compared with the traditional two-phase and four-phase control models, the traffic contact points are greatly reduced. Therefore, it can more effectively reduce the potential for accidents.

1.2 Control mode and signal timing
This paper adopts the method of time division of traffic flow, and allocates a certain amount of travel time to each phase according to the set traffic phase sequence. In one traffic cycle, the traffic objects in each phase will get one right of way. Considering the requirements of future traffic control systems and taking into account the control methods of traditional signal machines, this paper designs four control modes for signal machines: multi-period, fixed cycle, manual, and yellow flash.
In terms of signal timing, in order to ensure that traffic objects in all directions can pass through the intersection safely, the travel time in each direction cannot be less than 15 seconds, and in order to avoid the waiting time of traffic objects in all directions being too long, the signal cycle length should not exceed 200 seconds. Table 1 gives a signal timing scheme for a six-phase signal machine, with a traffic phase sequence of phase 1 to phase 6 and a yellow flash duration of 3 seconds.

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The signal cycle time is 192 s, and the signal light durations for each direction are shown in Table 2. In actual control, the travel time of each phase should be appropriately adjusted according to the traffic flow of each phase.

2 System hardware design
2.1 Overall hardware design
As a typical embedded system, the design of the signal machine should be application-centric, and the software and hardware can be tailored. This paper selects LM3S8962 as the main control chip. According to the functional requirements of the signal machine and combined with the chip characteristics of LM3S8962, the hardware block diagram of the designed signal machine system is shown in Figure 2.

2.2 Microprocessor and Memory Module
The embedded microprocessor is the core of the entire embedded system. LM3S8962 is a 32-bit RISC microprocessor based on the ARM Cortex-M3 core from Luminary Micro. It provides rich on-chip resources, including 256 KB FLASH, 64 KB SRAM, 4 32-bit general-purpose timers, synchronous serial interface (SSI), 10/100 Ethernet controller, 6 groups of 42 GPIO ports, etc. It supports the embedded real-time operating system μC/OS-Ⅱ and is suitable for cost-conscious system-level applications.
LM3S8962 has 256 KB FLASH space. FLASH is a non-volatile memory consisting of a group of independently erasable 1 KB blocks. The system software occupies a small space, and the use of the FLASH storage space provided by LM3S8962 can fully meet the system requirements. Therefore, this paper stores the μC/OS-Ⅱ system kernel and control software in blocks 0 to 253, and the control parameters in blocks 254 and 255. This can reduce system complexity and improve data access speed.
2.3 Traffic light and countdown module
This paper designs a signal machine for the control of 6 phases of motor vehicles and pedestrian walkways, a total of 6×2×3+2×2×2=44 signals. The 6 groups of GPIO ports of LM3S8962, PB3-PB5, PB0-PB2, PC4-PC6, PD0-PD2, PE0-PE2, PF0/PF1/PG0, respectively output the control signals of the 1st to 6th phase LED signal lights.
This paper uses 8-segment LED digital tubes as the countdown display components of the signal machine. The 6 phases and pedestrian walkways all use two-digit digital tubes, a total of 6×2+4×2=20 two-digit digital tubes. Using the synchronous serial interface (SSI, corresponding to the PA2~PA5 GPIO ports) of LM3S8962, configure SSI as the main mode, use the Freeseale SPI frame format, send 16-bit data (including 8-bit segment code and 8-bit bit code) outward each time through SSI, and then use two cascaded 74HC595 chips to convert the 16-bit serial data into 16-bit parallel data output, so as to achieve the purpose of outputting the segment code and bit code at the same time.
2.4 Real-time clock, Ethernet interface module
When the signal machine executes the multi-period control mode, it is necessary to execute the control scheme of the corresponding period according to the real-time time, and in order to facilitate user proofreading, it is necessary to display the real-time time on the LCD interface. This article uses the clock chip DS1302 of DALLAS company, which can count the year, month, day, week, hour, minute, and second, and has the function of leap year compensation. The three GPIO ports PA0, PA1, and PA6 of LM3S8962 are used to control the RST reset line, I/O data line, and SCLK serial clock line of DS1302 respectively, and commands or data are transferred into the clock register or moved out of the RAM register in a trigger mode of 1 byte or 31 bytes at a time, so as to realize synchronous communication between LM3S8962 and DS1302, thereby providing a real-time clock for the signal machine.

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The traditional RS 232/RS 485 serial port has defects such as short communication distance and low transmission rate, which cannot meet the requirements of future traffic control system networking. Therefore, this paper designs a 10/100Mb/s Ethernet interface for the signal machine. The LM3S8962 has a built-in 10/100 Ethernet controller, including a fully integrated media access controller (MAC) and network physical (PHY) interface device. In order to achieve signal level coupling and impedance matching and avoid mutual interference between the signal machine system and Ethernet, this paper connects the network transformer HR601680 between the PHY and RJ 45 interfaces, and connects the sending and receiving signal lines to the PHY and RJ 45 respectively. The Ethernet interface is shown in Figure 3.

2.5 Green conflict detection module
Green conflict detection is an important part of the system self-check, which detects whether there are two or more conflicting green light signals of the six phases at the same time. This paper uses the 8-bit data parallel input and output chip 74HC165 to design a green conflict detection circuit for the signal machine. The three GPIO ports PB7, PA4, and PG1 of LM3S8962 are used to control the parallel data loading, clock pulse input, and serial data reading of 74HC165 respectively. The eight input terminals of 74HC165 are connected to the green light signals of the six phases and two pedestrian paths respectively. LM3S8962 determines whether a green conflict occurs based on the read green light signal status and the green conflict judgment rules.

3 System software design
The system software includes three parts: device driver, control software, and network communication protocol.
3.1 Device
driver As the basis of system software, the device driver is the interface of the hardware device. The application program can control the work of the hardware device through this interface. The driver programs of this signal system include: FLASH read/write driver, SSI driver, Ethernet controller driver, DS1302 read/write driver, 74HC165 driver, etc.
3.2 uIP protocol
In order to realize Ethernet communication, it is necessary to transplant the network communication protocol. The uIP protocol stack is a micro TCP/IP protocol stack designed for small embedded microprocessors, which provides the necessary network protocol. This paper transplants the uIP0.9 protocol stack for the signal system and configures the signal system as a small WEB server. In the application, port 80 is listened to, and the relevant information of the current connection is read from the uip_conn structure. uip_connected() determines whether the remote host is connected to the local machine, uip_newdata() determines whether the new data of the remote host is received, and uip_send() sends the data packet to the remote host.
3.3 Software Function Module
The system control software is the core of the signal software. This paper adopts a modular design method and divides the control software into five modules according to its function: initialization, scheme processing, second period processing, green conflict detection, key processing, and communication.
Initialization includes hardware and software initialization. Hardware initialization includes testing of the on-chip FLASH, DS1302 chip, LCD module, Ethernet interface, etc. Software initialization includes initializing signal machine parameters, clearing flags, etc.
The solution processing reads the basic working parameters of the signal machine such as system control mode, working period, signal timing, and passing phase sequence from the FLASH, and stores them in a specific data structure for other modules to call. The
second period processing is completed by the timer that interrupts once per second to complete the tasks of outputting the color signal of each phase light, counting the countdown time for each phase, switching the passing phase, etc.
The green conflict detection is completed by the timer at a specific time to detect whether there is a green light signal conflict in each phase. If a green conflict occurs, an audible and visual alarm is issued and the yellow flash control is entered.
The key processing is completed by the external interrupt service program to query the system status, modify the system parameters, change the system working mode, etc.
The communication part is the Ethernet communication between the signal machine and the monitoring center, which completes the tasks of receiving the control command of the monitoring center and sending the signal machine status parameters.
3.4 Software Flow
After the signal machine is powered on, it is first initialized. If the initialization can be completed normally, it enters the scheme processing, takes out the working parameters corresponding to each control mode from the FLASH and stores them in a specific data structure. After that, the system enters the multi-period control mode by default and performs the corresponding control according to the working parameters of the current period. When the timer generates a 1 s interrupt, it enters the second period to process the output light color and countdown signal. When a key request is received, it enters the external interrupt handler to respond to the user request. When a remote host command is received or data is sent to the remote host, it enters the communication processing module. The signal machine enters the green conflict detection module at a certain time interval to detect green light conflicts.

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The software flow chart is shown in Figure 4.

4 Conclusion
This paper introduces the phase model, signal timing, software and hardware design and implementation technology of the six-phase traffic signal based on LM3S8962. The signal improves the control method of the traditional signal and can achieve high performance, multi-phase, multi-mode, and networked control. The system has high reliability, simple operation, and good upgrade and expandability. Tests show that the six-phase signal can effectively reduce intersection conflict points, reduce vehicle delays, improve intersection safety and service levels, protect pedestrians from passing safely, and ensure smooth operation of vehicles. Its social benefits are very obvious.