TMS320C5410 flash programming to achieve parallel bootstrap

Flash is a memory that can be electrically erased online and does not lose information after power failure. It has the characteristics of low power consumption, large capacity, fast erase speed, and internal embedded algorithms to complete chip operations, so it has been widely used in digital signal processing systems. This article introduces the burning method of Am29LV200B Flash memory through a complete example, realizing the parallel bootstrap of user programs after TMS320C5410 (hereinafter referred to as C5410) is powered on.

1 Am29LV200B Flash Memory

1.1 Introduction to Flash Memory

Am29LV200B is a Flash memory produced by AMD. Its main features are: 3 V single power supply, which can generate high voltage internally for programming and erasing operations; support JEDEC single power supply Flash memory standard; only need to write standard microprocessor instructions to its command register, specific programming and erasing operations are implemented by internal embedded algorithms, and can monitor whether the operation is completed by querying specific pins or data lines; can read, write or erase any sector without affecting the data in other parts. In this article, the 128K×16-bit Am29LV200B Flash is mapped as the off-chip data storage space of C5410, with the address of 0x8000~0xFFFF, and the data bus is 16 bits, which is used for 16-bit parallel boot loading. The 128K Flash ROM is accessed in four pages with a 32K address. The third page of the Flash ROM is used when the program is loaded at power-on.

1.2 Flash memory operation commands

The Flash memory can be programmed by writing address and data commands to specific registers of the Flash memory, but the operation must be carried out in a certain order, otherwise the Flash memory will be reset. Since the programming instruction cannot write "0" to "1", it can only change "1" to "0", and the erase command can change "0" to "1", so the correct order is to erase first and then program. The following introduces several commonly used operation commands: programming command, erase command, read data command, reset command.

① Programming command. This command writes data to the specified address of the Flash and requires four bus cycles. The first two are unlock cycles, the third is to establish the programming command, and the last cycle completes writing the programming data to the programming address, as listed in Table 1.

Since writing data to each programming address requires four cycles, it is relatively simple to use macros when writing Flash in a loop. The first address of the Flash ROM is 0x8000, so the offset address 0x555 corresponds to the physical address 0x8555. The programming procedure is as follows:
_WRITECOMMAND .macro pa,pd ; single cycle programming write
command macro, pa is the programming address, pd is the programming data
PSHM AR1
STM pa,AR1 ; AR1 points to the programming address
LD pd,A
STL A,*AR1 ; put the programming data into the programming address of AR1
RPT #12
NOP
POPM AR1
.endm
_WRITEFlash .macro par,pdr ; programming macro, par is the programming address register
, pdr is the register for storing programming data
_WRITECOMMAND #8555H,#0AAH ; cycle 1 (unlock)
_WRITECOMMAND #82AAH,#055H ; cycle 2 (unlock)
_WRITECOMMAND #8555H, #0A0H ; cycle 3 (establish)
LD pdr, A ; cycle 4 (programming)
STL A, par ; Put the data in the pdr register
into the address of the par register
RPT #12
NOP
_JUDGE par, pdr ; Check whether the programming is correct, see Flash
; operation detection.endm
_WRITECOMMAND
is a write command macro that implements one-cycle programming, while _WRITEFlash is a macro that completes four complete cycles of programming the specified address.

② Erase command. This command has two types: chip erase and sector erase. Both require 6 bus cycles, the first two unlock cycles, the third establishment cycle, the fourth and fifth unlock cycles, and the last is the chip erase or sector erase cycle, as listed in Table 2. Once the programming or erase command is executed, the internal programming or erase algorithm of the Flash is started to automatically complete the programming or erase operation. The erase procedure is as follows:
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③ Read data command. After power-on or internal programming and erase operations are completed, the data read state is entered. The data at the address to be read can be read by writing the address to be read.

④ Reset command. It resets the memory and enters the data reading state. Writing data 0xF0 to any address can reset the Flash memory. Before programming or erasing, it should be reset first. It should also be reset when an error occurs during normal operations such as programming or erasing. The reset procedure is as follows:
_RESETFlash .macro
_WRITECOMMAND #8001H,#0F0H
; Write 0F0H to 8001H to reset Flash
RPT #12
NOP
.endm

1.3 Flash operation detection

The programming or erasing algorithm inside the Flash can automatically complete the programming or erasing operation, but we must understand its internal operation detection mechanism to know whether the operation is completed or correct. The commonly used status bits for detection are: jump bit (DQ6), timeout flag bit (DQ5), data query bit (DQ7) and Ready/Busy pin (RY/). There are three detection methods. The first is to judge the state of the pin RY/. During the programming, erasing or erase suspend operation, the RY/ pin is always "0" and becomes "1" after the operation is completed. The second is to detect the jump bit DQ6. When programming or erasing, continuous reading of any address will cause DQ6 to jump continuously until the operation is completed. The last one is to use DQ7 and DQ5 of the data line: the number output by DQ7 during programming or erasing is the inverse code of the data written to this bit, and the output will become the data written to this bit when the operation is completed; when the state of DQ5 is "1", it means that the operation has timed out. At this time, the state of DQ7 should be read again. If the output of DQ7 is still not the written data, the operation fails and the Flash is reset. The process is shown in Figure 1.

The detection program is as follows:
_JUDGE .macro par,pdr; detection macro program. par is the programming address register
; pdr is the register for storing programming
data_JUDGEBEGIN?: PSHM AR1
LD pdr,B ; get the written data
AND #00FFh,B ; get DQ7~DQ0 of the written data
LD par,A ; read the data of the burned address
AND #00FFh,A ; get DQ7~DQ0
STL A ,TEMP ; save
LD A,-7,A ; read DQ7 status
XOR B,-7,A ; is it the inverse code?
BC _JUDGESUCCESS?,AEQ
; DQ7 is not the inverse code but the written data, indicating that the operation is successful
BITF TEMP,#20h
BC _JUDGEBEGIN?,ntc
; DQ5=1 indicates that the operation has timed out
LD par,A ; Reread the data of the programmed address AND
#00FFh,A
LD A,-7,A
XOR B,-7,A
BC _JUDGESUCCESS?,AEQ
; DQ7 is not the written data, indicating that the operation failed
_JUDGEERRO?
_RESETFlash ; Reset Flash
_JUDGESUCCESS?
POPM AR1
.endm 2 C5410 bootstrap There are generally two ways to run a program independently without an emulator: one is to run the user program directly in the Flash memory after power-on, which is a relatively slow operation; the other is to boot the user program from the Flash memory to the high-speed data memory after power-on or reset. This method is the most commonly used and can achieve high-speed operation at a lower cost. In order to achieve this process, the DSP boot function must be used. (1) Boot After the C5410 is powered on and reset, it first checks the MP/MC status: if it is high, it means that the DSP is in microprocessor mode, that is, the user program is executed from the external program memory address 0FF80H; if it is low, it means that the DSP is set to microcomputer mode and the program is executed from the address 0FF80H of the on-chip ROM. The address 0FF80H stores the interrupt vector table, which is actually a branch transfer instruction (BD 0F800H), which makes the program jump to 0F800H to execute the boot program (Bootloader). Bootloader is a program code solidified in the ROM of the DSP chip. Its function is to load the user program from the outside to the on-chip RAM or extended RAM to make it run at high speed. Before moving the program, the Bootloader first completes the initialization work: invalidate the interrupt, map the internal RAM to the program/data area (OVLY=1), set 7 wait states for both the program and data areas, etc. C5410 has the following boot modes: host interface HPI, parallel port (8/16 bit), standard serial port (MCBSP0 is 16-bit boot mode, MCBSP2 is 8-bit boot mode) and I/O port (8/16 bit) boot mode. (2) Parallel boot mode This mode is more commonly used. The word width of the external memory is 8 or 16 bits. During the boot mode, these codes are transferred from the data storage space to the program storage space through the external parallel interface bus, and the contents of the SWWSR and BSCR registers can be reset. The parallel boot mode first reads the contents of the boot table head address from the I/O port at address 0FFFFH. If this content does not conform to the 8-bit or 16-bit boot mode, it reads from the data memory at address 0FFFFH and performs 8-bit or 16-bit parallel boot mode. Therefore, while burning the Flash data, the first address of the boot table must also be burned at 0FFFFH. The boot process is shown in Figure 2. (3) Create a bootstrap table The content of the bootstrap table includes not only the code segments to be loaded, but also the length of each code segment, the target address of each code segment, the program entry address and other information. To complete the bootstrap function, a correct bootstrap table must be created. The bootstrap table can be automatically generated by the hex500 format converter; or it can be manually created, that is, the program to be burned is directly placed in the burning program, and the bootstrap table is manually created according to the relevant information of the burned program. [page] 3 C5410 Flash Burning and Parallel Booting The following uses a Flash burning example to introduce how to burn the user program into Flash, how to manually create a bootstrap table, and how to run the user program independently in parallel booting mode without the emulator. The burned and burned programs are as follows: .title “FLASH” .mmregs SWCR .set 002BH TEMP .set 0060H .data .sect ".BOOT" .label BOOTTABLE ; Start of boot table .word 10AAH ; 16-bit boot mark .word 7FFFH ; 7 wait cycles (SWWSR) .word 0F000H ; Block switch register (BSCR) .word 0000h ; Program entry XPC .word 0200h ; Program entry address (MAIN_START) .word LOADEND - LOADSTART ; Program block length (0116H) .word 0000h ; Store target XPC .word 0100h ; Store target address LOADSTART: ; Interrupt vector table start address.copy "vector.asm"; Jump to MAIN_START at reset MAIN_START: ; Main program to be programmed STM #0F7h,SP STM #012Ch,PMST









































;IPTR=01(interrupt vector pointer is 100, pointing to target address),MP/MC=0,OVLY=1,AVIS=0,DROM=1, CLKOFF=1
LOOPF:RSBX XF ;XF set low
CALL DELAY ;Delay
SSBX XF ;XF set high
CALL DELAY
B LOOPF
DELAY:PSHM AR6
STM #0090H,AR6
DELAY_LOOP:
RPT #0FF0h
NOP
BANZ DELAY_LOOP,*AR6-
POPM AR6
RET
LOADEND ; The program being burned ends.space
20h
.mmregs
.label FINDTABLE
.word 8000h
.text
ERASE_WRITE_Flash: ;The burning program starts
STM #0FFA0H,PMST
STM #07FFFH,SWWSR
STM #0FFFFH,SWCR
_RESETFlash ; Flash reset
_ERASEFlash ; Erase Flash
WRIFlashSTART: ; Start Flash programming
SSBX SXM
RSBX OVM
_RESETFLASH ; Flash reset
STM #8000H,AR0 ; Flash start address 8000H
STM BOOTTABLE,AR5 ; Source address to be programmed (boot
; table header address)
STM #( LOADEND- BOOTTABLE),AR4
; Write 011E words
WRI_RPT
_WRITEFlash *AR0,*AR5 ; Call in programming macro
LD *AR0+,A
LD *AR5+,A ; Complete AR0 and AR5 addresses automatically add 1
BANZ WRI_RPT,*AR4-
STM #0FFFFH,AR0; AR0 points to FFFF in data space
; address
STM FINDTABLE,AR5
_WRITEFlash *AR0,*AR5 ; To FFFF in data space
; Address is written to the first address of the bootstrap table 8000H
ENDD: NOP
B ENDD
.end

The main program to be burned starts from MAIN_START and goes to LOADEND. The main function of the program is to continuously change the state of the XF pin. LOADSTART is the beginning of the interrupt vector file (vector.asm), and a jump to MAIN_START instruction (BD MAIN_START) is placed at the interrupt reset (RESET). ERASE_WRITE_FLASH is the beginning of the burning program. As long as the program pointer (PC) points to ERASE_WRITE_FLASH, the Flash burning operation can be completed by starting to run. The data stored from the boot table starting address BOOTTABLE (0F8H) to LOADEND (0216H) is the content to be written into the Flash. The data from LOADSTART to LOADEND is the program for the DSP boot program to move from the Flash to the on-chip RAM, as follows:
00F8H: BOOTTABLE; Boot table starts
0100H: LOADSTART; Interrupt vector table starting address
0100H: RESET: BD MAIN_START
...; Interrupt vector table content
0178H: RESERVED
0200H: MAIN_START
...; Main program
0216H: LOADEND

The entire parallel boot process is as follows: After C5410 is powered on and reset, it determines that MP/MC=0 and is in microcomputer working mode, and executes the branch transfer instruction (BD 0F800H) of the interrupt vector table from 0FF80H of the on-chip ROM, causing the program to jump to 0F800H to execute the boot program. After the bootloader completes initialization, it reads the content of the 0FFFFH address of the data space, finds the first address of the bootloader table 8000H, and starts reading the content from 8000H. First, there is the 16-bit bootloader mark (10AA). Then the contents of registers SWWSR and BSCR, the program entry address, the length of the code segment, the target address of the code segment, and other information. Finally, based on this information, the program from 8008H to 811EH of the Flash is moved to the address starting from 100H of the on-chip RAM, jumps to the on-chip RAM 100H, that is, PC is 100H, XPC is 0, and starts executing the user program to complete the parallel boot process of the user program.

Conclusion

After the program is burned into the Flash, reset the C5410 to put it in the microcomputer working mode; use an oscilloscope to test the XF pin to observe whether the program runs correctly. The above method can complete the burning of the Am29LV200B Flash by C5410, and well realize the user program bootloader function after the C5410 is powered on.

References
1 TMS320VC5410 Bootloader SPRA609A Copyright (c) TI, 2000-04
2 Am29LV200B Copyright (c) 2002 Advanced Micro Devices, 2002-04-12
3 Zhang Xiongwei, Cao Tieyong. Principles and Development and Application of DSP Chips. Beijing: Electronic Industry Press, 2001