Application of AT24C256 in Single Chip Microcomputer System

1 Introduction
AT24C256 is ATMEL's 256kbit serial electrically erasable programmable read-only memory, 8-pin dual-in-line package, with compact structure, large storage capacity, etc. 4 ICs can be connected in parallel on a 2-wire bus, especially suitable for data acquisition systems with high-capacity data storage requirements. This article will introduce the working principle of the IC and the software and hardware interface with the microcontroller. 2
Main features and pin description of AT24C256:
2.1 Main features - The chip has three operating voltages;
5.0V (VCC = 4.5V ~ 5.5V)
2.7V (VCC = 2.7V ~ 5.5V)
1.8V (VCC = 1.8V ~ 3.6V)
- 32k × 8 storage units can be formed internally;
- 2-wire serial interface;
- Schmitt trigger, filter input to suppress noise;
- Bidirectional data transfer protocol;
- Hardware write protection pin and software data protection function;
- 64-byte page write mode.
2.2AT24C256 pin description
The pin arrangement is shown in Figure 1.

A0, A1: Address selection input. In the serial bus structure, 4 AT24C256 ICs can be connected. A0 and A1 are used to distinguish each IC. A0 and A1 are 0 when they are left floating.
SCL: Serial clock input. The rising edge writes the data on SDA to the memory, and the falling edge reads the data from the memory and sends it to SDA.
SDA: Bidirectional serial data input and output port. Used for data exchange between the memory and the microcontroller.
WP: Write protection input. When this pin is connected to the ground, write operations are allowed; when connected to VCC, all write memory operations are prohibited. If not connected, the chip is pulled down to the ground.
VCC: Power supply.
GND: Ground.
NC: Empty.
3 Working principle of AT24C256
There are 512 pages inside the AT24C256, each page is 64 bytes, and the address of any unit is 15 bits. The address range is 0000H~7FFFH.
3.1 Chip working status
1) Clock and data transmission
In general, SDA is pulled high by an external device. Only when SCL is low, the data on SDA changes, indicating that data is to be transmitted. When SCL is high, SDA changes from high to low, indicating the start of data transmission. This state must be before all commands. 3)
End state ( STOP) When SCL is high, SDA changes from low to high, indicating the end of data transmission. 4) Acknowledgement state (ACK) [page] All addresses and data are serially transmitted to or read from the memory in 8-bit form. The memory sends a zero signal on SDA in the 9th clock cycle to indicate that 8 bits of data have been received. See Figure 2 Bus protocol diagram.

3.2 Device Addressing
EEPROM After entering the start state, an 8-bit address word is required to select the chip for reading and writing. The device address word consists of a command word consisting of 5 bits 0 and 1, two address selection bits A1 and A0, and a read/write operation bit. For AT24C256, the command word is "10100". Four devices can be connected to the same serial bus, distinguished by address lines A1 and A0. If there is only one AT24C256, A1 and A0 are both 0. The lowest bit is 1 for read operation, and 0 for write operation. 10100A1A0R/W
4AT24C256 read and write mode and 5 working timing
4.1 Write operation
There are two ways: write byte and write page.
1) Write Byte
After sending the device address word to AT24C256 and receiving the response signal, it is necessary to send two 8-bit addresses to select the address to write data. AT24C256 receives this address, responds with a zero signal, and then writes 8-bit data to AT24C256 according to the clock. After receiving the data, the memory returns an acknowledgement signal. After writing the data, AT24C256 enters the internally timed write cycle. During the write cycle, all inputs cannot be made until the writing is completed and the EEPROM responds. The byte writing process is shown in Figure 2.
2) Write Page
AT24C256 has a page writing function with 64 bytes as a page, and can write a page at a time. The initialization process of writing pages is basically the same as the method of writing bytes. The difference is that after writing a byte, the microcontroller does not send a stop status command, but after the acknowledgement signal, it inputs 63 bytes. After each byte is received, the EEPROM still outputs a zero acknowledgement signal. Because there are only 64 units in a page, the lower 6 bits of the data word address will automatically increase by 1 after receiving a byte, and the higher address will remain unchanged, that is, the page address will remain unchanged. When the internally generated address reaches the page boundary, the next byte will be placed at the beginning of the page. If the data sent to the E2PROM exceeds 64 bytes, the earliest written byte will be overwritten. The process is shown in Figure 3 for the write page operation. [page]

4.2 Read Operation
There are 3 ways to read. The initialization process is basically the same as the write operation, except that the lowest bit in the device selection word is changed to read. See Figure 4 for the read operation flow chart.

1) Current address read
The address of the internal data is kept at the last read and write operation address plus 1. As long as the chip is powered, this address is kept. After reading the last byte of the EEPROM, it returns to the beginning.
2) Random read
Before random read, a byte address must be written to the EEPROM before reading.
3) String read
It can be either current address read or random address read. After the microcontroller receives a word, it returns a response signal. Once the EEPROM receives the response signal, the address is increased by 1, and then the next byte is output. When the microcontroller does not return a response signal after receiving the data, it indicates that the reading process is over.
5 Application in single-chip microcomputer data acquisition system
5.1 Hardware connection
Figure 5 is the schematic diagram of the application of AT24C256 in the single-chip microcomputer data acquisition system. The entire acquisition system is controlled by AT89C51, which is responsible for the initialization of peripheral chips and data transmission. Among them, DS1302 is the clock chip of Dallas Company. Its role in this system is to generate year, month, day, hour, minute and second, which is used to record the time of data acquisition. 2543 is a 12-bit serial A/D chip with 11 analog channels. The data to be collected is directly connected to the analog input port of 2543 from the sensor through signal modulation. AT24C256 is used to save the collected time and data.
5.2 Software Programming
Write a byte to AT24C256. The byte to be written is in register A.
BYTEW: MOVR2, #8
SETBP1.5
SETBP1.4; Stop bus operation
NOP
NOP
CLRP1.4
CLRP1.5; Start bus operation
OTSLP: RLCA
JNCBITLS
SETBP1.4
JMPOTSL1
BITLS:CLRP1.4
OTSL1:SETBP1.5; Write data
NOP
NOP
CLRP1.5
DJNZR2,OTSLP
SERBP1.5
SETBP1.4
RET

References

[1] ATMEL. Technical data of AT24C256.
[2] He Limin. Selection of Practical Technology of Single-Chip Microcomputers [M]. Beijing University of Aeronautics and Astronautics Press, 1992.