Using single chip microcomputer to control DDS to realize modulation of short wave frequency hopping system

Frequency synthesizer is a device that uses one (or more) standard signals to generate multiple frequency signals. It requires not only high accuracy and stability of the output frequency, but also the widest possible frequency band. Direct digital frequency synthesis (DDS) is the third generation of frequency synthesis technology developed after direct frequency synthesis and indirect frequency synthesis. Because it has the advantages of relatively wide bandwidth, short frequency conversion time, high frequency resolution, easy integration, and controllable frequency, phase and amplitude, it is widely used in military communication systems such as radar and electronic countermeasures and mobile communications. Especially in short-wave frequency hopping communication, the signal changes continuously over a wide frequency band, and requires rapid frequency and phase changes within a small frequency interval. DDS technology is an ideal choice for frequency hopping signal modulation. The frequency hopping system requires not only a high-precision frequency synthesizer that changes frequency rapidly, but also an instruction that can generate hundreds or thousands of frequency hopping sequence generation and frequency control. This article uses the 89C51 microcontroller as the central control chip to generate frequency hopping instructions and control the DDS to achieve frequency hopping signal modulation.

1 Modulation of shortwave frequency hopping communication system

The shortwave frequency hopping system generally adopts M-ary frequency shift keying (MFSK) modulation. Reference [1] proposes that the modulation of the shortwave frequency hopping communication system can adopt the four-phase differential keying (DQPSK) modulation method. Since the shortwave channel is approximately static only within the bandwidth of 10 kHz (daytime) or 2.5 kHz (nighttime) [1], the differential phase modulation information of the frequency hopping signal is the phase difference between the adjacent frequencies at the same frequency. According to the literature [2], we choose the following system parameters: ① The frequency hopping interval is 3 kHz; ② The frequency hopping bandwidth is 1.536 MHz, with a total of 512 frequency points; ③ The number of hopping frequencies is 64, which is selected from the 512 frequency points according to the channel quality; ④ The frequency hopping rate is 2560 hops/second (frequency gap time 390.625 μs, signal time 333.333 μs, frequency change time 57.292 μs); ⑤ The information bit rate is 5120 bit/s. Figure 1 is a block diagram of the FH/DQPSK modulation process of the signal. In the synchronous state of the clock, the absolute phase of the signal that last appeared with the same frequency hopping code is taken out from the 64 phase memories according to the frequency hopping code, and the differential phase is added as the absolute phase of the current signal and stored in the phase memory. At the same time, the frequency hopping code controls the output signal frequency word, writes the phase word and frequency word into the corresponding memory of the DDS to update the frequency and phase, and starts the DDS work. The differential phase is determined by every two information bits. If the π/4DQPSK method is used, the relationship between the information sequence and the phase change is shown in Table 1.

Table 1 Relationship between coding and phase change of π/4 DQPSK system

2 DDS Technology

The AD7008[3] used in this paper is a CMOS DDS chip produced by AD. This chip has comprehensive functions, high cost performance, is easy to develop, and has good performance in finished products. Its phase accumulator is 32 bits and the frequency resolution can reach 0.012 Hz. The frequency conversion speed is unrelated to the frequency interval (resolution). The frequency conversion rate is only limited by the speed of the device response, which is usually tens of nanoseconds. Due to the high degree of digitization and integration, the stability of the output frequency reaches the order of magnitude of the crystal frequency stability. It is suitable for frequency modulation, phase modulation, orthogonal amplitude modulation (other general DDS chips do not have) and driving the frequency multiplication phase-locked loop to form a frequency synthesizer with high resolution and fast conversion speed. The actual maximum output frequency of the DDS is about 1/3 of the clock frequency. The higher the output frequency, the higher the noise power. According to the literature [3], when the clock frequency fc = 50MHz and the output frequency f0 = 5.1MHz, the maximum harmonic frequency is 15.3MHz, with an amplitude of 51.8dB, which can generally be filtered out by a low-pass filter. For the system with a frequency hopping bandwidth of 1.536MHz (less than 5.1MHz) in this paper, modulation can be directly implemented using the AD7008 chip. [page]

The modulation circuit of this system is completed by using the 51 series single-chip microcomputer (89C51) to control the DDS chip (AD7008). As shown in Figure 2, the data control word is first written into the parallel register of AD7008 under the control of WR and CS through the D0~D7 data bus, and then the parallel register data is transferred to the function register as shown in Table 2 under the control of LOAD and TC0~TC3.

Table 2 AD7008 external control logic (parallel mode)

Using the internal reference voltage of AD7008 (VREF=1.27V), the full-scale current output is when RSET≈390Ω. Connect a 50Ω resistor between pin IOUT and ground, and the output signal has a peak-to-peak frequency hopping signal of 1V. P1.0 and P1.1 control the chip reset and the frequency register selection respectively. According to the circuit, the RAM6116 address is 0000H~07FFH, the parallel register address is 4000H, the command register address is 8000H, the frequency register 0 address is 0A000H, the frequency register 1 address is 0A800H, the phase register address is 0B000H, and the IQ register address is 0B800H. The value of the phase register is the differential phase. The corresponding register values ​​(lower 12 bits) of 0, π/4, π/2, 3π/4, π, 5π/4, 3π/2, and 7π/4 are: 000H, 200H, 400H, 600H, 800H, 0A00H, 0C00H, and 0E00H. The frequency hopping timing of the frequency hopping signal is realized by the timer 0 interrupt: the frequency hopping rate is 2560 hops/second, and the timing time is 390.625μs.

3. Program Implementation

The software flow chart of the modulation system is shown in Figure 3.

The key to the modulation of frequency hopping signals is the generation of frequency hopping codes and the control of DDS. The shortwave FH/DQPSK system requires a frequency hopping sequence with good characteristics. The development of chaos theory provides a new method for the generation of frequency hopping sequences. The frequency hopping pattern performance is relatively good when chaotic nonlinearity is used to generate frequency hopping sequences. Reference [4] introduces the generation of Logistic chaotic FH sequences using a single-chip microcomputer. At present, the research on chaotic sequences is mainly about the limited word length problem of hardware implementation. We use a single-chip microcomputer to implement the m-sequence based on the Lempel-Greenberger model (abbreviated as LG model) [5], select a period of 63, and provide different m-sequences for users. It can be used in the frequency hopping synchronization acquisition system that uses the chaotic initial value transmission of the short code to guide the long code [6] at the beginning of communication (the m-sequence must be processed with a wide interval to be suitable for the shortwave frequency hopping system). Figure 4 is the waveform of the baseband frequency hopping signal displayed by the oscilloscope.

The above discussion discusses the modulation design method of frequency hopping signal based on the single chip microcomputer control DDS technology, and writes some experimental programs. During the debugging of the system, it was found that the oscilloscope displayed that the phase of the waveform was not correctly modulated at a certain frequency hopping point. The signal first appeared in the form of a sine wave (select the same phase output) at the new frequency hopping frequency for a certain period of time. When the new phase shifted to the phase register of the DDS, the signal had a new phase. After analysis, it was found that this was because the data from the parallel port register of the AD7008 chip was not transferred to the frequency and phase registers at the same time. This can be solved by replacing other DDS chips, such as the AD9850 [7], whose frequency and phase data can be input at the same time (the frequency word is 32 bits, the phase word is 5 bits, and the sleep and manufacturer test control word is 3 bits, a total of 40 bits) to control the implementation of high-speed DDS technology. In addition, the baseband frequency hopping signal modulation that is only a digital signal must be modulated twice into a short-wave single-sideband (SSB) signal before it can be transmitted. If a DDS chip with a higher maximum output frequency is used, one-time modulation of short-wave frequency hopping signals can be achieved. With the improvement of manufacturing technology, this is achievable. At present, DDS chips have reached more than 1 GHz. A better way is to combine DDS with phase-locked loop (PLL) technology to achieve it. It has higher frequency stability, accuracy and resolution, and has the characteristics of small size, low power consumption and easy operation.