A method of parallel communication between single-chip computers and multiple computers

　　The single-chip multi-machine parallel communication system introduced in this article uses 89C51 as the host and multiple 89C2051 as slaves. (89C2051 is a 20-pin 300MIL package with a 2K FLASH E2PROM microcontroller. Except for two missing parallel ports, it has all the functions of the MCS-51 series microcontroller. Because of its small size and strong functions, it will be widely used in the field of microcontroller applications. ). This parallel communication method is suitable for playing the role of communication controller in multi-site, multi-level detection and control systems; it is also suitable for use as a microcontroller serial port expansion circuit.

　　Figure 1 Logic diagram of the chip and four working states　

　　　　　　Figure 2 Principle block diagram of parallel communication of microcontroller

　　2 Tri-state bus buffer register 74HC646

　　In a multi-machine parallel communication system composed of a single-chip microcomputer, information exchange on the bus generally uses methods such as PIO (parallel interface) and dual-port registers, supplemented by a bus arbitration circuit. Commonly used parallel interface chips include 8155, 8255, etc. This article introduces a simple parallel interface circuit, which can not only replace chips such as 8255, but also make the circuit structure simpler and more compact. The circuit consists of a 74HC74 and a 74HC646 (300MIL narrow package).

　　74HC646 is a three-state bus buffer register. It is actually a dual-port shared memory, but the shared memory area is very small. There is only one data input register and one data output register. It is used as a temporary transfer station for single-byte communication data. Each To transmit a byte, the master and slave shake hands once, and then continue the communication of the next byte after taking the data. 74HC646 can latch the data of the two buses separately, and then exchange data through the chip's internal bus. 74HC646 has four working states. By controlling these four working states, multiple microcontrollers can use the data port to exchange data, saving the remaining port lines to do other work, such as driving LEDs, controlling switches, etc. The logic diagram and four working states of the 74HC646 chip are shown in Figure 1.

　　3 Principles of parallel communication with microcontrollers

　　The latching of data by 74HC646 only prepares information for the completion of data exchange. The realization of communication between multiple microcontrollers must also have communication means so that the microcontroller can understand the working status of the bus and avoid bus conflicts. A four-wire handshake is used here: two wires are sent from the sender to the receiver to notify the receiver that the data is ready (TFNE*, RFNE* in Figure 2); two wires are sent from the receiver to the sender to notify the sender that the data is ready. The received communication signal (TFNF*, RFNF* in Figure 2) is generated by the 74HC74 circuit. The block diagram of the single-chip parallel communication principle is shown in Figure 2.

　　4 Multi-machine parallel communication protocol

　　The above parallel communication microcontroller does not block the circuit to prevent the master and slave computers from writing or reading data to the 74HC646 at the same time. Therefore, each microcontroller must control its next operation based on the status information during two-way transmission, that is, contact, through software, The cooperation of hardware communication protocols can avoid errors and ensure that there will be no competition conflicts with 74HC646. Therefore, in addition to the communication circuit mentioned above, the following protocols must also be followed when programming software:

　　. When the host sends data to 74HC646, it must ensure that the 74HC646 receiving register is empty.

　　. The data transmission between the master and the slave must pass through the 74HC646. The protocol does not allow both parties to operate the 74HC646 at the same time. They must control their operations based on the status information.

　　5 Format and execution process of communication protocol

　　5.1 Information format

　　In the asynchronous communication transmission of parallel communication, there are also frame type and format issues. A similar frame format to serial communication can be used:

　　Characteristic word

　　Length

　　Data 1

　　Data 2

　　...

　　Check code

　　5.2 Execution process of communication protocol

　　The following uses the detection method as an example to illustrate the execution process of the communication protocol.

　　5.2.1 The process of the master writing data to the slave: (the master writes, the slave reads)

　　The host writes data to the 74HC646, and then notifies the slave that there is data, and the slave reads the data from the 74HC646.

　　① The host reads the status bit and checks whether the TFNF* bit is zero.

　　② If TFNF*=1, the host waits temporarily; if TFNF*=0, the host writes data to 74HC646 so that TFNF*=1 and TFNE*=0.

　　③ The slave reads the status bit and checks whether the TFNE* bit is zero. If TFNE*=1, the slave waits temporarily; if TFNE*=0, the slave reads data from 74HC646, so that TFNE*=1 and TFNF*=0.

　　④ The host checks again whether the status bit TFNF* is zero. If it is "0", it means that the slave has taken the data from the 74HC646 and the host can send the next data.

　　5.2.2 The process of master reading from slave: (slave writing, master reading)

　　The slave writes data to the 74HC646, and then notifies the host that data is coming. After the host receives the signal, it takes the data from the 74HC646.

　　① The slave reads the status bit and checks whether the RFNF* bit is zero.

　　② If RFNF*=1, the slave waits temporarily; if RFNF*=0, the slave writes data to 74HC646, making RFNF*=1 and RFNE*=0.

　　③ The host reads the status bit and checks whether the RFNE* bit is zero. If RFNE*=1, the host waits temporarily; if RFNE*=0, the host reads data from 74HC646 so that RFNE*=1 and RFNF*=0.

　　④ The slave checks again whether the status bit RFNF* is zero. If it is "0", it means that the slave has taken the data from the 74HC646 and the host can send the next data.

　　6 Flow chart (detection method)

　　The program flow using the detection method is shown in Figure 3.　　

　　Figure 3 Program flow chart using detection method

　　If you use the interrupt method, you only need to slightly modify the execution process and flow chart.