Design and implementation of BOOT for TMS320VC5410

TMS320VC54X series DSP chips are generally equipped with a BOOT program inside the chip. The main function of the BOOT program is to load the user program from the outside into the program memory when the computer is turned on. The size of the BOOT program in different types of DSP chips is different. TMS320VC5410 has a 2K-word BOOT program inside. The following introduces the BOOT design method of TMS320VC5410.

1 BOOT mode selection
When we use the BOOT program of TMS320VC5410, we need to set the DSP to the microcomputer working mode (sample MP/MC=0 after hardware reset). When the boot program in the chip is executed and the DSP is reset, the program starts to execute the program from FF80H of the internal ROM. At FF80H, there is a jump instruction to turn to the masked BOOT program in the ROM, so that the internal BOOT program starts to run. This boot program is first initialized. Initialization work includes disabling interrupts (INTM=1), mapping the internal dual access block/single access block to the program/data space (OVLY=0), and setting 7 wait states for both the program and data spaces.
There are 5 modes for TMS320VC5410 program boot:
(1) HPI mode, which is a host interface mode. The host interrupts the DSP by writing to the host control register (HPIC), and the DSP interrupts the host through the host interrupt signal . The host can respond to the HINT signal and clear the signal. Whether HINT is low determines whether the host interface HPI boot mode is selected.
(2) Parallel I/O port BOOT mode (supports 8 bits and 16 bits).
(3) Serial port mode (standard/TDM/BSP) (supports 8 bits
and 16 bits). There are 8 serial port boot modes. The boot mode is determined by the two formats of word length 8 bits and 16 bits and the setting of CLKX/FSX pins. When using 8-bit sub-length, the following control bits need to be set:
· Receive reset signal RRST;
· Transmit mode bit TXM;
· Clock mode bit MCM (make CLKX driven by the on-chip clock source);
· Frame synchronization mode bit FSM (frame synchronization pulse signal must be applied externally to FSR pin);
· Format bit FO (select 8-bit data transmission mode). (4) External parallel mode (supports 8 bits and 16 bits). (5) WARM BOOT, that is, hot boot mode, can control the transmission entry address, and can also be used after the device is hot reset or the program code has been transferred to the on-chip or off-chip memory (such as DMA) by other means. In WARM boot mode, the SRC or ADDR field in the BRS word specifies the upper 6 bits of the entry address.
This article mainly discusses the 8-bit/16-bit parallel I/O port boot mode.
The I/O port boot mode provides a method for asynchronously transferring program code from the I/O port address space 0h to the internal or external program memory. Figure 1 is the program flow chart.
From the flowchart in Figure 1, we can see that by setting the content of the FFFFH address in the data area reasonably, making it an effective parallel boot, we can realize our parallel I/O BOOT mode.
2 Design the content of the FFFFH address to make it an effective parallel boot data The content filled in the FFFFH address is the starting address of the designed application program. In the designed program, the starting address is 08000h of page 0. Therefore, in this program, the content of FFFFH is set to 08000h.
3 Set the content of 08000h to realize the boot function
We can get the data we need to fill in according to Figure 2. From the flowchart in Figure 2, we can know that we need to write the specified value starting from address 08000h to meet the requirements. See Table 1.
According to Table 1, we can fill in the words that meet the requirements. 4 Get the information of the filled-in words
To get the information of the filled-in words, you need to generate a table. Before generating this table, you need to make a batch file. The batch file is as follows:
(1) First compile and generate the ".out" file; (
2) Open UltraEdit-32 batch editing software;
(3) Use the hex command to edit.
The hex command format is as follows:
myfile. out／* Input COFF file name. -e 0x0000／* Program start address. -a／* ASCII output format. -boot／* Boot all program units. -bootorg PARALLEL／* Create PARALLEL BOOT boot. -memwidth 16／* 16-bit EPROM. -o myfile. hex／* Output file name. Here is a small program to show the specific operation process (the program starts at 0x2000): hex500 test1. out－e 0x2000－boot－bootorgPARALLEL－memwidth 16－romwidth 16－o test1．hex In this way, a table can be generated, as shown in Table 2. The underlined ones in Table 2 represent the starting address of each Section, and the framed ones are the length of this Section (note that when we fill in this table, we should add 1 to the length of the Section, which is the experience gained after application), and the last four 0s of the last Section indicate the end. From the above, we can use the parallel BOOT mode.















→参考文献CH(开始)
1 Li Gang (ed.) Principles and Development and Application of Digital Signal Microprocessors. Tianjin: Tianjin University Press, April 2000
2 Ren Lixiang, Ma Shufen, Li Fanghui (eds.) Principles and Applications of TMS320C5400 Series DSPs. Beijing: Electronic Industry Press, 2000, 7
3 Peng Qicong (ed.) TMS320C54X Practical Tutorial. Chengdu: University of Electronic Science and Technology Press, 2000, 1