Introduction to PIC microcontroller interrupt module

PIC microcontroller interrupt module introduction:

PIC 16F87X series microcontrollers can receive up to 14 interrupt sources. The interrupt controller register INTCON marks the request of each interrupt source, sets the mask bit for each interrupt, and sets the global mask bit for all interrupts.

The interrupts of the PIC16F87X series include: TMR0 overflow interrupt (TOIF), external interrupt (INTF), port B change interrupt (RBIF), parallel slave port interrupt (PSPIF), A/D conversion interrupt, USART asynchronous receive interrupt (RCIF) and asynchronous transmit interrupt (TXIF), synchronous serial port interrupt (SSPIF), CCP1 interrupt (CCPIIF), TMR2 interrupt (TMR2IF), TMR1 interrupt, CCP1 interrupt (CCP2), E2PROM write interrupt (EEIF), and bus collision interrupt (BCLIF).

Each interrupt is processed in a query mode, that is, when the CPU port responds to an interrupt, it is necessary to first query the interrupt flag bit to determine which interrupt generated the interrupt request, and then execute the corresponding interrupt service program.

The RB0/INT external interrupt still follows the interrupt principle of the PIC16F87X microcontroller. When an interrupt occurs, an interrupt flag is generated, and the CPU queries and identifies the interrupt. According to this principle, multiple external interrupt sources can be expanded, and the CPU queries the interrupt flag to identify the interrupt after responding to the interrupt.

The external interrupt on the RB0/INT pin is edge-triggered, either rising or falling, which is determined by the INTEDG bit (D6) of the selection register OPTION_REG. When INTEDG = 1, the rising edge is selected; when INTEDG = 0, the falling edge is selected. Once a valid edge is detected on the pin, the INTF bit (D1 of INTCON) is set to 1. This interrupt is enabled or disabled by the interrupt control bit INTE.

To prevent the same interrupt from being executed in an infinite loop, the INTF bit must be cleared to 0 by software in the interrupt service routine before re-enabling the interrupt. If the INTE bit is set to 1 before entering the sleep state, the INT interrupt can wake up the CPU in the sleep state. The state of the GIE bit determines whether the processor jumps to the interrupt vector after being woken up.

When the counter TMR0 of timer TIMER0 overflows (i.e. changes from FFH to 00H), the hardware will automatically set the TGIF position to 1. The interrupt can be controlled by setting the TOIE bit to open or close the interrupt.

When the CPU responds to RB7 and RB4 interrupts, there are two situations: the first is called "short pulse", that is, the pin level returns to the original state during the CPU response to the interrupt, and the CPU will not generate a false interrupt in this case. The second is called "wide pulse", that is, the pin level returns to the original state after the CPU responds to the interrupt, and the process of returning to the original state also generates an interrupt request, which is a false interrupt phenomenon.

Once there is a level change on the D7~D4 pins of port B, the RBIF position is set to 1. This interrupt can be controlled by setting the RBIE bit to control whether the interrupt is open.

The above is the detailed introduction of the PIC microcontroller interrupt module.