The excitation system is an important auxiliary device of the generator set. It plays an important role in the automation of the power plant and the reliability of the operation of the generator set. With the development of science and technology, the excitation method has developed from the DC motor excitation system to the thyristor excitation, and the automatic regulator has developed from the original analog type to the microcomputer digital type.
The excitation regulation device studied in this paper is a microcomputer excitation regulator that combines classical and modern control theories with digital signal processor DSP technology and embedded technology. It inherits all the adjustment, control and limiting protection functions of the past microcomputer excitation regulator, and at the same time has made great improvements in computing speed, anti-electromagnetic interference, reliability, etc., effectively ensuring the realization of the adjustment and control functions of the entire system; the periphery adopts advanced large-scale programmable logic devices to improve the reliability of the entire system and form a logic system open to users.
1. The composition principle of the excitation regulator
Figure 1 Schematic diagram of excitation regulation system
The figure shows the composition of the self-shunt excitation regulator system. The machine itself supplies power to the thyristor rectifier bridge. The AVR device obtains the data control quantity through PI or PID calculation based on the collected data. After the comparison circuit, a trigger pulse is generated to adjust the size of the thyristor conduction angle to keep the machine terminal voltage at a constant value, thereby ultimately achieving the purpose of control.
The system is mainly composed of a microcomputer excitation regulator; an electrical brake stop device, etc. Two identical controller redundancy configurations are used, and the physical channels are independent of each other. Each channel basically includes: power supply system, main board, sampling board, analog input and output board (A/D, D/A), switch input and output board, pulse forming and amplification board, etc.
2. Embedded system part
2.1 Embedded hardware unit
ARM (Advanced RISC Machines) is a well-known company in the microprocessor industry. It has designed a high-performance, low-energy RISC processor with the characteristics of high performance, low cost and low energy consumption. It is used in a variety of embedded fields and is equipped with Thumb expansion, debugging and Harvard bus. The 5-stage pipeline improves the clock frequency and parallel processing capabilities. It integrates multiple functions such as serial port, USB Host controller, LCD controller, Nand Flash controller, IDE, PCMCIA, etc. 32K FRAM. The highest resolution is 1024X768X32 chip, built-in Ethernet controller, and rich on-chip resources.
The management unit in this system is based on ARM9 as the core, serial parallel interface chip, D/A converter and other hardware, responsible for managing LCD, external communication, printing, recording and analysis. It has greatly increased additional functions such as system communication, background management, remote maintenance, etc. It can run operating systems and applications such as QT, and has relatively strong transaction management functions.
The control unit is based on DSP as the core, responsible for pulse formation, AD conversion, data calculation, etc. Due to its special structure, special hardware multiplier and special instructions, DSP can quickly realize various digital signal processing and meet various high real-time requirements. Its advantages lie in its powerful data processing capabilities and high operating speed.
This system uses a dual-core embedded system of ARM and DSP chips, making full use of the respective characteristics of ARM and DSP for collaborative development. As the control part, DSP can give full play to its unique advantages in digital signal processing; as the management part, ARM can give full play to its advantages in front-end display communication management, making the front-end part relatively independent and reducing the burden on the main CPU; even if a fault occurs, it will not affect the background main program, which correspondingly enhances the redundancy capability of the entire device. The two exchange real-time data transparently through HPI.
Figure 2 ARM+DSP embedded hardware diagram
2.2 Embedded operating system selection
Multiple operating systems can be ported to ARM chips, such as Window-CE, VXWorks, etc. Linux has the following characteristics: 1) open source code and rich software resources; 2) powerful kernel functions, efficient and stable performance, and easy multi-tasking; 3) perfect network communication, graphics, and file management mechanisms; 4) support for a large number of peripheral hardware devices; 5) low price can effectively reduce product costs. Based on development cost considerations, the ARM-Linux system was finally selected. [page]
2.3 ARM and DSP connection
HPI is a parallel serial port, through which ARM can directly access DSP storage space and address mapping storage space of peripheral devices. HPI is mainly composed of address register HPIA, data register HPID, and control register HPIC. ARM first sets the control register and address register, and then reads and writes the data register according to the control signal. Before reading/writing with HPI, the ARM processor must first complete a series of initializations such as its own working mode. The source code is as follows:
SYSCFG=0xeTffe22; /* Turn off the ARM cache */
EXTDBWTH=0K0ffff556; /* Make the external I/O interface work in 32-bit mode */
EXTAC0NO=0x08610000 /* Configure the read and write timing relationship of the external I/O interface */
This code operates on the registers, configures the ARM processor working mode, and then reads and writes the external I/O interface, thereby completing the corresponding operation of the HPI interface. The HPI interface can be used in I/O port mode or I/O access mode. The system platform uses I/O access mode to map the HPI access address register HPIA, data register HPID, and control register HPIC to the space starting at the physical address of memory 0x3fd40000, and operate the HPI through memory access instructions.
The HPI physical address is defined as follows:
#define HPI-Base Ox3fd40000
#define Vpint /* volatile unsigned int */
#define HPICW (Vpint (HPI-Base +0x00))
#define HPICR (Vpint (HPI-Base +0x40)) /* Define HPIC register */
#define HPIAW (Vpint (HPI-Base +0x10))
#define HPIAR (Vpint (HPI-Base +0x50)) /* Define HPIA register */
#define HPIDW (Vpint (HPI-Base +0x20))
#define HPIDR (Vpint (HPI-Base +0x60)) /* Define HPID register */
When communication starts, ARM sends a command to DSP (such as data acquisition), interrupts DSP through the HPI port, and makes DSP enter the corresponding subroutine; at the same time, DSP stores the data in the buffer, and the length of one frame is 256 bytes. When ARM requests data from DSP, it sends a frame synchronization command word to DSP and interrupts DSP at the same time. DSP responds to the interrupt and sends the data to the HPI port RAM. After storing a frame of data, DSP sends an interrupt to ARM. ARM responds to the interrupt, clears the interrupt, takes out the data from the HPI port and stores it in RAM, and sends it to the terminal for display and cyclic refresh. Part of the ARM program flow chart is shown in the figure below:
Figure 3 ARM partial program flow chart
HPI read and write data part of the code:
for (i=0; i
{
HPICW=0x00000000; /*Initialize the control register of the HPI port*/
HPIAW=0x800000000; /*Initialize the address register of the HPI port*/
hpiBaseAddr[i]=HPIDR; /*Read data through HPI and send it to the array for temporary storage*/
CpLen=HPISize;
if (copy_to user (buffer, (_u8*)(&hpi>HpiBaseAddr[j]), CpLen)) return-EFAULT;
/*Copy the data to the user buffer*/
return CpLen
}
In the development of the control unit with DSP as the core, most of the code is written in C language, and the development environment CCS IDE (Code Composer Studio Integrated Development Environment) provided by Ti is used to compile, assemble and link the program, and simulate and debug the program. Finally, the generated DSP executable code is downloaded to the DSP's Flash.
3. Conclusion and innovation
Taking advantage of the powerful functions of ARM9 CPU and the convenient and efficient underlying support provided by embedded Linux multi-process and multi-threaded programming, the excitation regulation device developed has many advantages such as high reliability and easy operation, and plays a pivotal and core role in the excitation regulation control system. This paper introduces the dual-core embedded hardware platform composed of ARM and DSP dual CPUs, gives the overall hardware design diagram of the system, and introduces the design of the ARM and DSP communication parts in detail. In the future, there will be more and more systems based on DSP for data processing and ARM for management, and the application of the two will become more and more extensive.
Innovation: (1) The system uses ARM processor instead of single-chip microcomputer, which greatly improves the system performance; (2) The use of ARM and DSP dual-core embedded system gives full play to the respective advantages of ARM and DSP; (3) The industrial-grade large LCD touch screen replaces the traditional LCD, and the friendly human-machine interface is easy to learn and use.
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