Design of network UHF reader based on ENC28J60+AS3990

Publisher:光子梦境Latest update time:2011-12-22 Source: 电子产品世界Keywords:ENC28J60+AS3990 Reading articles on mobile phones Scan QR code
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Abstract: In order to realize the remote real-time interaction function of ultra-high frequency (UHF) reader/writer, this paper uses LPC2138 as the main controller based on Ethernet network card chip ENC28J60 and ultra-high frequency radio frequency identification chip AS3990 to realize the hardware and software solution design of ultra-high frequency network reader/writer. The real-time operating system μC/OSII and lightweight IP protocol LwIP are transplanted on the reader/writer, so that the reader/writer can be connected to the Internet, and the remote configuration of reading and writing parameters and real-time data interaction are realized, which meets the diverse needs of UHF readers and writers in the rapidly developing RFID industry.

introduction

The rise of the Internet of Things industry has brought opportunities for the development and widespread application of RFID technology. Ultra-high frequency (UHF) reading and writing systems will become a hot spot for future research and development in the field of RFID due to their advantages such as long reading distance, fast reading and writing speed, large number of concurrently read tags, and low tag prices. However, there are few types of UHF readers and writers on the domestic market, and the interface is single, so it is difficult to abandon the traditional reader plus PC operation mode when using them. These shortcomings limit the large-scale use of UHF readers and writers, especially in logistics and other occasions that require remote object identification and information acquisition. Based on the radio frequency identification chip AS3990, this article describes the hardware and software design of a network reader and writer based on the network card chip ENC28J60, so that the reader and writer can be directly connected to the Internet for remote data acquisition and parameter configuration, enhancing the practicality of the UHF reader and writer.

1 Hardware Design

The overall design framework of the reader is shown in Figure 1. The main controller uses the controller LPC2138 based on the ARM7TDMIS core. The chip has 32 KB of on-chip SRAM and 512 KB of on-chip Flash memory. It has rich external interfaces and can well meet the requirements of reader design. The RF chip AS3990 is used to implement the tag interaction required in the ISO180006C (i.e. EPC GEN2) protocol, and provides two interface access methods for the external controller. The controller only needs to send simple control and configuration commands, and the AS3990 can complete the interaction process with the electronic tag. ENC28J60 is a 10M Ethernet network card chip compatible with IEEE802.3. It realizes data exchange with the control chip through the SPI port. The power module uses the power chip EZ10853.3 to provide stable 3.3 V DC power supply for each module.

Figure 1 Overall design framework of the reader

Figure 1 Overall design framework of the reader

1.1 RF chip interface circuit

AS3990 is a dedicated RF chip developed by Microsystems for UHF RFID readers that complies with ISO180006C standards. It integrates receiving circuits, transmitting circuits, protocol conversion units, control interfaces, etc. Users only need to connect a small amount of RF circuits to complete the functional design of the reader/writer module.

AS3990 can interact with the main controller LPC2138 through a parallel interface or a serial SPI interface. The RF chip interface circuit is shown in Figure 2. IO0~IO7 are used for the parallel interface, among which IO6 and IO7 can also be used for data transmission of the SPI port; the pin CLK is used as the clock line of the SPI interface; the EN pin is the enable pin of AS3990; and the IRQ is the interrupt pin of AS3990.

Figure 2 RF chip interface circuit

Figure 2 RF chip interface circuit

In order to reduce the impact of phase noise on read and write performance, an external voltage-controlled oscillator (VCO) is used in the circuit. The output of the VCO is connected to the EXT_IN pin. On the other hand, the AS3990 controls the voltage-controlled oscillator through the CP pin. A 20 MHz temperature-compensated quartz crystal resonator TCXO is connected to the OSCO pin as a reference oscillator, which can further improve the stability of the chip.

Since the AS3990 does not have an integrated power amplifier, an external power amplifier PA is required. When using the external PA mode, the RF signal modulated by the AS3990 is output at RFONX and RFOPX. The two RF signals are converted into a single RF signal through a balanced/unbalanced converter and then enter the PA for power amplification. The analog output pin DAC of the AS3990 is used to control the gain of the PA. The circulator is used to isolate the transmission path from the receiving path. Similarly, the received RF signal is converted into two differential signals through a balanced/unbalanced converter, and the internal demodulation circuit of the AS3990 demodulates the two signals to obtain data.

1.2 Network card chip interface circuit

ENC28J60 is a 28-pin independent Ethernet controller produced by Microchip. It has a built-in 10 Mbps Ethernet physical layer device and a media access controller. It complies with the IEEE 802.3 standard and is particularly suitable for network access solutions for embedded devices. ENC28J60 interacts with the controller LPC2138 through the SPI interface. The network card chip interface circuit is shown in Figure 3. SO, SI, and SCK are the three buses of the SPI interface, CS is the chip select signal of ENC28J60, and the interrupt signals INT and WOL are connected to EINT3 and EINT1 of the main controller respectively. The two differential receiving pins TPIN and the two differential transmitting pins TPOUT of the chip ENC28J60 are externally connected to a 1:1 pulse transformer, and the output of the pulse transformer is connected to the network port.

Figure 3 Network card chip interface circuit

Figure 3 Network card chip interface circuit

2 Software Design

The network reader software design includes four parts: μC/OSII transplantation, LwIP protocol stack transplantation, network card driver and upper layer application programming. The overall framework of software design is shown in Figure 4.

Figure 4 Overall framework of software design

Figure 4 Overall framework of software design

2.1 μC/OSII transplantation

Operating system porting is the basis for LwIP protocol stack porting and application programming [3]. The porting content on LPC2138 includes:

① Complete the basic configuration and data type definition required by the operating system, and write the switch interrupt function file OS_CPU.H.

② Complete the stack initialization function OSTaskStkInit() in the file OS_CPU.C, and write related Hook functions according to your own needs.

③ Use the file OS_CPU_A.S to complete the writing of the function OSStartHighRdy that starts the highest priority task, the task switching function OSCtxSw, the interrupt-level task switching function OSIntCtxSw, and the system clock interrupt service function OSTickISR.

④ Initialize timer 0 to provide clock for the system.

2.2 LwIP protocol stack porting

① Complete the definition of data types used in the LwIP protocol, such as u8_t, s8_t, u16_t, u32_t, etc. This makes the data types used in the protocol stack no longer affected by the processor and compiler of the porting platform, and enhances the portability of the protocol stack. When porting, define these data types in advance according to the compiler and porting platform, as follows:

typedef unsignedcharu8_t; //define 8-bit unsigned integer

typedef signedchars8_t; //define 8-bit signed integer

typedef unsignedshortu16_t; //define 16-bit unsigned integer

typedef signedshorts16_t; //define 16-bit signed integer

typedef unsignedintu32_t; //define 32-bit unsigned integer

typedef signedints32_t; //define 32-bit signed integer

② Define the critical section protection function for switching interrupts, and define the structure encapsulation macro to avoid the compiler's automatic address alignment. The implementation of LwIP is based on such a mechanism that the upper layer protocol has clearly known the structural characteristics of the data transmitted by the lower layer, and the upper layer directly uses the address calculation to obtain the desired data, avoiding the copying and buffering of data when it is submitted. Therefore, it is necessary to define the structure encapsulation macro to prohibit the compiler's automatic address alignment to prevent the data structure from being disrupted.

③ Implement functions related to semaphore and mailbox operations [5], such as creation, deletion, waiting, release, etc. LwIP uses mailboxes and semaphores to implement information exchange between upper-layer applications and protocol stacks, and between lower-layer hardware drivers and protocol stacks. These functions can be implemented by calling the semaphore and mailbox functions provided by μC/OSII.

④ Implement a function sys_arch_timeouts related to waiting timeout. This function can return the first address of the timeout event list of the current protocol stack. When initializing the LwIP process, some timeout events will be initialized at the same time, such as ARP timeout, TCP timeout, etc. When some events wait for timeout, the protocol stack will automatically call some timeout processing functions for related processing to meet the needs of the TCP/IP protocol stack.

⑤ Implement the function of creating a process, which can be completed through the OSTaskCreate function provided by the operating system.

2.3 Network Card Driver Writing

Network card chip manufacturers generally provide a wealth of driver functions, which encapsulate these interface functions accordingly, encapsulate the received data packets into data structures familiar to the LwIP protocol stack, and encapsulate the sent data packets into data structures familiar to the chip. The functions of sending and receiving data packets need to be implemented. The interface between the chip and the controller LPC2138 is defined as follows:

#defineSPI_SCK(0x01﹤﹤4) //P0.4

#defineSPI_MISO (0x01﹤﹤5) //P0.5

#defineSPI_MOSI (0x01﹤﹤6) //P0.6

#defineENC28J60_CS (0x01﹤﹤8) //P0.8

#defineENC28J60_INT (0x01﹤﹤9) //P0.9

2.4 Application Programming

Based on the multi-task environment, two tasks are created on the reader: one is the HTTP server task, in which the reader can be regarded as a network server, which can respond to the remote browser connection request and return Html data to the browser, so that the reader status can be obtained remotely; the other is the reader's read-write task, in which the reader is used as a client, which needs to connect to the remote control server, receive the server's configuration or control commands, respond and perform related operations, and finally return the operation results or data to the server. The application process is shown in Figure 5.

Figure 5 Application flow

Figure 5 Application flow

Conclusion

The rise of fields such as e-commerce and smart logistics that require the use of a large number of electronic tags has made UHF readers play an increasingly important role in the field of Internet of Things and RFID. At present, some UHF readers have appeared on the domestic market. Most of these readers use USB interface or serial port to communicate with the host computer. Due to the limited distance between the host computer and the reader, this limits the free installation of UHF readers and writers, and is no longer applicable in some remote control reading and writing occasions. In addition, due to the limitation of the hardware resources of the host computer, it is impossible to achieve real-time control of a large number of readers and writers at the same time. The network UHF reader proposed in this article based on the RF chip AS3990 and the network card chip ENJ28C60 can solve the above problems well and meet the needs of the current RFID market.

Keywords:ENC28J60+AS3990 Reference address:Design of network UHF reader based on ENC28J60+AS3990

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