SD storage technology and its application based on S3C2410

Publisher:dandan666Latest update time:2011-12-22 Source: 电子产品世界Keywords:S3C2410 Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere

Abstract: This paper first introduces the basic structure and principle of SD Memory Card (Secure Digital Memory Card), focusing on the command words and operation flow of SD card. Then it studies the hardware interface circuit between Samsung 32-bit embedded processor S3C2410 and SD card and its basic reading and writing operation methods for SD card.

Keywords: SD; storage; S3C24101

1 Introduction

SD card (Secure Digital Memory Card) is a new generation of memory based on Flash. It focuses on the security, capacity and performance of data storage. It is an ideal external storage medium for many portable electronic products such as digital cameras, mobile phones, PDAs, etc.

2 Basic Concepts of SD

2.1 SD communication protocol

The SD card system can work under two communication protocols: SD protocol and SPI protocol. Users can freely select the communication protocol of the SD card system during hardware initialization. For a specific hardware circuit, users only need to use one communication protocol.

This article only discusses the most commonly used SD protocol based on the author's hardware.

2.2 SD data transmission method

SD supports two data transmission modes: 1-bit mode (standard bus) and 4-bit mode (wide bus). In 1-bit mode, data is transmitted only on data line 0 (DAT[0]). In 4-bit mode, data is transmitted simultaneously on 4 data lines (DAT[3:0]). In 4-bit data transmission mode, the maximum data transmission rate can reach 100Mb/sec. Table 1 lists the definitions of SD interface signals in the two modes.

Definition of SD interface signals in two modes

After power-on, the system works in 1-bit mode by default. When the SD card is in transfer mode, the user can freely change to 1-bit or 4-bit mode.

2.3 SD communication principle

The SD bus is a star-shaped bus structure. The system allows one master controller and up to ten slave devices (SD cards). When the system is initialized, the master controller assigns a device address to each device, and then the master controller can independently operate the device according to the device address.

SD bus communication is based on command and data bit streams, each of which includes a start bit and an end bit.

Each SD command represents the start of a card operation. SD commands are transmitted via the command line (CMD).

After receiving the command, the SD card will send a response signal to the host controller to indicate that a command has been received. The response signal is transmitted on the CMD line. A small number of commands do not have a response signal, which depends on the type of command.

SD data transmission is bidirectional. All data transmission is carried out on the data line.

2.4 Data organization format in SD system

The command transmission, response signal transmission and data transmission in the SD system have their own special organizational forms, as shown in Figure 1.

SD data organization format

The first bit of all command words, responses and data is the start bit "0" and the last bit is the end bit "1".

The second bit in the command word and response is the sender flag bit, "1" indicates the host controller command, and "0" indicates the SD card response signal.

The SD card has four different responses: R1, R2, R3 and R6, depending on the command word received. For details, please refer to the SD related documents.

When transmitting data, if the wide bus transmission mode is used, four bits of data are transmitted at the same time, using four data lines respectively. The CRC check code on each data line is calculated independently.

3 SD card operation process

All communications in the SD system are controlled by the host controller. The host controller must be responsible for initializing the system, setting various parameters required for communication, and then initiating data read or write operations. During this series of processes, the SD card may be in one of the various states shown in Table 2.

SD card status and operation mode

3.1 System Initialization

The system's operating mode at this stage belongs to the card authentication mode.

The main controller first sends the command word CMD0 to reset all cards in the system in the identification mode. After receiving the command CMD0, the SD card will be initialized and obtain a default address 0 (relative card address register RCA = 0x0).

Then the host controller sends the command ACMD41 to query the OCR (operating environment register) of the SD card with the required operating voltage range as the parameter. Cards whose operating voltage is not within this required range will be excluded from further bus operations and enter the inactive state. Cards that meet the voltage range requirements will enter the ready state.

Next, the main controller sends a command CMD2 to obtain the identification number CID of the SD card. After the SD card sends the CID number, it enters the identification state.

Finally, the host controller sends the command CMD3 with the relative address as the parameter. After receiving the command, the SD card updates its RCA with the parameter. After that, the host controller can use this address to address the card.

After initialization is completed, the SD card is in the waiting state of the data transmission mode, which is the initial state of the data transmission mode. At this time, the card selection command CMD7 enters the transmission state, and data can be written and read.

3.2 SD write operation

The reading and writing of SD cards is based on data blocks. The size of data blocks varies from card to card, usually from 512 bytes to 2048 bytes. The size of data blocks for a specific card is defined in the card's characteristic register (CSD). In special cases, some cards support reading and writing in small blocks (the smallest unit can be bytes). However, it is recommended to read and write in blocks.

SD cards support single-block writing and multi-block writing. Single-block writing uses command CMD24, and multi-block writing uses command CMD25. When there are multiple data blocks to be written, using multi-block writing can achieve higher efficiency than executing single-block writing multiple times.

Since the SD card has a buffer area inside, the SD card is in the data receiving state during the above process, and the received data is not actually written into the memory of the SD card, but is stored in the buffer area of ​​the SD card. When the data reception is completed, the SD card automatically enters the data programming state, and the data is actually written into the memory of the SD card.

3.3 SD read operation

Corresponding to the write operation, the SD card supports single-block read and multi-block read. Single-block read uses command CMD17, and multi-block read uses command CMD18. When there are multiple data blocks to read, using multi-block read can achieve higher efficiency than executing single-block read multiple times.

4 Applications based on S3C2410

Samsung's S3C2410 is a 32-bit embedded processor with a built-in SD host controller that is compatible with SD 1.0, MMC 2.11, and SD IO 1.0 versions. The S3C2410 can be easily interfaced with an SD card.

4.1 Interface between S3C2410 and SD card

The interface between S3C2410 and SD card is shown in Figure 2. Among them, nCD_SD is the card detection signal, and WP_SD is the write protection signal of the card. For simple write operation, it is only necessary to detect the WP_SD bit before writing.

S3C2410 SD card expansion interface

4.2 Using S3C2410 to read and write SD cards

In the usual SD read and write operations, you can use the query mode, interrupt mode or DMA. When the SD card is in the transmission state, first reset the S3C2410 send buffer, select the bus width, select read data or write data, select the number of read and write data blocks, select the start address of the read and write data blocks, write the read or write command word, and then continuously read or write one or more data blocks from/to the SD data buffer according to the number of data blocks to be read or written. The following code can use the query mode to write one or more data blocks to the SD card:

The process of reading SD card is similar to that of writing, except that the command words used are different. Users can modify it according to the write operation code.

5 Conclusion

As more and more electronic products support SD memory cards, the application scope of SD cards is getting wider and wider. The storage system composed of the 32-bit embedded processor S3C2410 and the SD card provides users with a safe and lightweight storage solution. SD cards have many functions, and all operations cannot be explained clearly in this article. However, through the introduction of this article, readers can have a conceptual understanding of SD and understand its basic operation process, and then extend it.

Keywords:S3C2410 Reference address:SD storage technology and its application based on S3C2410

Previous article:A brief discussion on embedded real-time systems and their applications in communication systems
Next article:Research on the mobile local personal digital library system based on Android

Recommended ReadingLatest update time:2024-11-16 17:58

Building QT/Embedded4.8.5 development environment on s3c2410 (Part 1) --- Environment Introduction
I recently participated in a competition and needed to use the Broadcom s3c2410 development board to build a QT/Embedded environment. It took a lot of effort. I wanted to use the qtopia desktop at first, but the migration was always unsuccessful. Later I found that it was CentOS6.4, but the qtopia (version 2.1.1) prov
[Microcontroller]
Design of wireless temperature transmitter based on S3C2410 processor and IEEE802.11b
IEEE802.11 is an IEEE wireless LAN standard, mainly used for wireless access of user terminals. IEEE802.11 only specifies the physical layer and medium access sublayer of the open system interconnection reference model. Its MAC layer uses the carrier sense multiple access/collision avoidance (CSMA/CA) protocol; it def
[Microcontroller]
Design of wireless temperature transmitter based on S3C2410 processor and IEEE802.11b
Detailed explanation of s3c2410 watchdog
1. What is a watchdog? Watchdog, the Chinese name is "watchdog", the full name is watchdog timer. From the literal meaning, we can know that it is actually a timer. However, it is different from the timers we usually come into contact with in terms of function. Ordinary timers generally play a role in timekeeping. Tim
[Microcontroller]
S3C2410 Touch Screen Driver Notes
一些关键部位做了简单的注释 #include linux/config.h #include linux/errno.h #include linux/kernel.h #include linux/module.h #include linux/slab.h #include linux/input.h #include linux/init.h #include linux/serio.h #include linux/delay.h #include asm/io.h #include asm/irq.h #include asm/arch/regs-adc.h #include asm/arch/regs-gpio.h
[Microcontroller]
Interpretation of S3C2410 reset circuit
First, understand why a reset is needed: 1: Because microprocessors (such as computer CPU chips and high-end ARM chips we often say) and microcontrollers (single-chip microcomputers, low-end ARMs, etc.) chips are digital circuit chips, their normal operation is only in two levels: 0 low level and 1 high level, which
[Microcontroller]
Interpretation of S3C2410 reset circuit
Porting Embedded Linux to ARM Processor S3C2410: Device Driver
The device driver is the interface between the operating system kernel and the machine hardware. It shields the application from the details of the hardware. Generally speaking, the Linux device driver needs to complete the following functions:   · Equipment initialization and release;   Provide various equipment serv
[Microcontroller]
Porting Embedded Linux to ARM Processor S3C2410: Device Driver
Design of abnormal interrupt program based on ARM9 chip S3C2410
introduction In computer architecture, exceptions or interrupts are a mechanism for handling emergencies in the system, and almost all processors provide this mechanism. Exceptions are mainly a description from the perspective of passive acceptance by the processor, referring to exceptions caused by unexpected
[Microcontroller]
Design of abnormal interrupt program based on ARM9 chip S3C2410
Latest Industrial Control Articles
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号