Software and hardware design scheme for large-capacity dynamic electrocardiogram recorder

The waveform measured by electrodes from the human body surface and displayed after amplification is called an electrocardiogram (ECG). Clinically, ECG is one of the main bases for doctors to diagnose heart diseases. Since some abnormal ECG information only appears under certain specific circumstances, long-term recording of ECG has extremely important clinical value. At present, the storage capacity of domestic portable ECG recorders is relatively small [1-2], and can only record ECG data for a maximum of 8 hours; although the use of microcomputer control has excellent monitoring and analysis performance, it is large in size and not suitable for home patient monitoring and rescue of critically ill patients in ambulances, remote areas and field troops. Therefore, a small dynamic ECG recorder with low power consumption and large storage capacity has been developed . This recorder can completely record 24 hours of ECG information; it has low power consumption and can be powered by portable alkaline batteries. It is of practical value for small and medium-sized hospitals, families and rescue of critically ill patients on the road. 1 Main components of ECG recorder Figure 1 is a block diagram of the basic circuit composition of a small ECG recorder. All chips in this circuit are low-power chips. 1.1 Low-power and high-capacity Flash memory The data storage of the 28F128J3 small ECG recorder uses Intel's 28F128J3 Flash memory chip. The chip uses the manufacturing technology of 0.181μm ETOXTMVⅡ (J3C) and 0.25μm ETOXTM VI (J3A) to store two bits per unit, which greatly improves the quality and reliability of the memory and increases the storage density. The chip adopts a high-density symmetrical block structure with 128 128K-byte blocks. It allows users to perform byte programming and write buffer byte programming operations on any block, and the programming time per byte is 210μs; if the write buffer byte programming method is used, 32 bytes of programming takes a total of 218μs, and the programming time per byte is only 6.8μs. The chip's block erase time is 1s, allowing a suspended interrupt to perform a read operation while programming or block erase operations are in progress. After the read operation is completed, a suspended recovery command is written, and then programming or block erase is continued. The chip's read operation is similar to that of EEPROM, with a read speed of 25ns. The chip uses a power supply voltage of 2.7V to 3.6V, with a maximum operating current of 80mA and a current of only 50μA in sleep mode. At the same time, its power consumption is very small. Its storage capacity is 128Mb, or 16Mbyte. It is a low-power, high-density, non-volatile dynamic ECG data acquisition and storage medium, and is very suitable as a data storage device for a small dynamic ECG recorder. This instrument uses four 28F128J3 Flash storage chips with a total storage capacity of 64Mbyte. Based on the calculation of sampling ECG signals 200 times per minute, the capacity of each lead ECG data to be stored for 24 hours is approximately 17Mbyte, and the three-lead ECG data is approximately 51Mbyte, which can fully meet the requirements. In terms of software design, a circular recording form is adopted. When the 64Mbyte recording is completed, a sector is erased and new ECG data is written. Therefore, the instrument always records the latest 24-hour ECG data. 1.2 Low-power microcontroller W78LE54 W78LE54 is a low-power 8-bit microcontroller with a wide power supply voltage range (2.4V~5.5V) launched by Winbond and fully compatible with MCS-8051. The chip contains 16Kbyte Flash EPROM, 256byte RAM, 4 8-bit bidirectional I/O ports, 4 bit-addressable bidirectional I/O ports, 3 16-bit timers/counters, hardware watchdog, 1 serial port, and 8 interrupt sources. The normal operating current is no more than 10mA. If the microcontroller is set to low-power sleep mode, the operating current is only 1.5mA. The maximum operating current of the MCS-8051 microcontroller is 40mA, and the sleep mode current is 14mA. In addition, W78LE54 contains program memory, so the read operation power consumption is small, and there is no need to use the method of reducing memory power consumption described in the literature; at the same time, the microcontroller contains program memory, which has stronger resistance to electromagnetic interference. It can be seen that the overall power consumption of the W78LE54 microcontroller is much less than that of the MCS-8051 series microcontrollers. The selection of W78LE54 as the CPU chip is based on the low-power design concept. 1.3 Low-power, fully autonomous single-chip 12-bit A/D converter M12L458 is a low-power, wide voltage range (3V~5V) 13-bit (12-bit + sign bit) autonomous A/D converter launched by National Semiconductor in 1999. The price of this A/D converter is only twice that of an ordinary 12-bit A/D converter, but its comprehensive performance is much higher than that of an ordinary 12-bit A/D converter. The conversion time of the 13-bit A/D converter is 7.7μs, the maximum power consumption is 15mW, the typical operating current is 2.25mA at 3.3V voltage, the maximum current is 3.5mA, the standby current is 1.5μA, and the standby power consumption is 5μW. M12L458 is a fully autonomous A/D converter, which contains an instruction RAM and an event sequence generator, as well as a 32-word FIFO data buffer with self-correction function. It interfaces with the microprocessor through a 16-bit or 8-bit bus, and has interrupt request and DMA request functions. After the chip is reset or receives a CPU command, it can automatically complete online self-correction, and the self-correction parameters are stored in its own correction data RAM. The data converted by the A/D converter is first stored in the FIFO buffer, which can store up to 4 groups of 8-channel data. When the CPU receives an interrupt or DMA request, it can directly read the FIFO data buffer, or transfer the data to the CPU memory at one time through the DMA controller, which can greatly save the CPU's A/D conversion control overhead. 2 Design architecture of a small dynamic ECG recorder As can be seen from Figure 1, the design of the recorder is divided into the detection, amplification and filtering of analog ECG signals, and the storage and processing of digital ECG signals. That is, the ECG signal is input through the lead, amplified, filtered, and A/D converted to obtain a digitized ECG signal, which is then sent to the single-chip microcomputer system, where the software completes QRS wave detection, processing, and storage. Finally, the ECG waveform is displayed on the LCD screen through the human-machine interface circuit, or the detected waveform data is sent to the microcomputer through the RS232 interface for the doctor to analyze and diagnose. They are introduced below. 2.1 Detection, amplification and filtering of analog ECG signals Ag-AgCI electrodes are attached to the left arm, right arm and thigh of the patient. The ECG signals obtained from the body surface are amplified by the preamplifier composed of the high-precision, low-power CMOS operational amplifier LMC6035 to form standard I, II, III lead input ECG signals, which are switched by the analog multi-way switch CD4052; the selected ECG signal is amplified by the low-power instrument amplifier AD620, filtered out high-frequency interference by the 5th-order full-pole low-pass filter MAX280 with no DC error, and then further suppressed power supply interference by a 50Hz notch filter designed with the LMF90 chip, and then added to the fully autonomous A/D converter M12L458 for A/D conversion, thereby obtaining a digital ECG signal. 2.2 Storage and processing of digital ECG signals The biggest feature of the ECG recorder designed in this paper is its large storage capacity. The memory is composed of four flash memory chips 28F128J3, each with a storage capacity of 16M bytes, and the total storage space of the four chips is 64M bytes. If calculated at a sampling frequency of 200Hz, each ECG lead stores about 17M bytes of data for 24 hours, and three-lead ECG data is about 51M bytes. In order to record ECG data with high fidelity, doctors generally do not want to compress the data, so no data compression method is used, and the original ECG data is recorded directly. 2.2.1 Hardware interface between large-capacity flash memory 28F128J3 and single-chip microcomputer W78LE54



































Since 28F128J3 needs to address 16M bytes, it needs 24 address lines, but the 8-bit microcontroller W78LE54 has only 16 address lines and can directly address 64K bytes. Therefore, the lower 16-bit address (A0~A15) is normally connected to the microcontroller address line, and the high-order address line (A16~A23) is extended through the P0 port by the low-power high-speed 8D latch 74HC377, so that the addressing capacity of the microcontroller reaches 16M bytes. The chip select signals Y0~Y3 of the four 28F128J3s are generated by the P1 port through the 74HCl38 decoder. The specific circuit connection block diagram is shown in Figure 2.



2.2.2 Software Design

The main tasks of the ECG recorder software are ECG data acquisition, QRS detection, storage control of flash memory, heart rate digital display and alarm, and data serial communication with the microcomputer. The software controls the A/D sampling at a sampling rate of 5ms, performs nonlinear transformation and integration on the collected ECG signal to form an energy peak, and then uses the improved adaptive dual-threshold peak detection algorithm to perform QRS detection, determine the RR interval, take its derivative as the instantaneous heart rate, and then use the average heart rate of the current four heartbeats as the new heart rate value. All these data are stored in the flash memory, so that the doctor can input them into the microcomputer through the serial port for playback, analysis, diagnosis and processing of the ECG waveform.

The ECG recorder introduced in this article uses low-power device design for hardware, with the characteristics of large storage capacity, low power consumption, small size and high reliability. In addition, no compression algorithm is used for ECG data, the ECG signal has high fidelity and long recording time. It is a small ECG recorder for readers' reference.