Variable Range Speed ​​Control System Based on Phase-locked Loop

The variable range speed control system based on phase-locked loop introduced in this paper is developed for the research and development of a new generation of speed regulating motor controller with winding characteristics [1]. Its speed signal detection method has the characteristics of simple structure, easy installation, low cost and reliability.

1 PLL motor speed control system principle

The block diagram of the motor speed control system composed of a phase-locked loop is shown in Figure 1, in which the VCO has been replaced by a motor and an optical tachometer. The excitation voltage adjusts the speed of the motor, and a slotted fan-shaped flat disk is installed on the shaft of the motor. When the fan-shaped disk rotates, it continuously cuts off the light emitted by the light-emitting diode, so that the photosensitive tube in the optical coupler generates a square wave pulse sequence u2 (ω2) with a frequency that is an integer multiple of the motor speed. In this way, the frequency of the square wave pulse has a certain functional relationship with the excitation voltage, which is equivalent to a voltage-controlled oscillator in the phase-locked loop. In order for the optocoupler to output a square wave with a good waveform, a Schmitt trigger is usually connected after the photosensitive tube to shape the signal, as shown in Figure 2.

2 PLL motor speed control system model design

Since the motor has a large inertia, it is equivalent to a phase lag network with a large time constant, which may have a significant impact on the loop stability.

The loop uses a CMOS frequency detector and phase detector. The frequency of the square wave signal generated by the optocoupler is proportional to the motor speed, and it performs frequency and phase detection with the frequency of the input reference signal u1 (ω1). After the phase-locked loop is locked, the motor speed can be stabilized at the set value, with no tracking frequency error, only phase error. The selected frequency detector and phase detector should ensure that the loop has sufficient capture range, and the loop can be locked under various starting conditions.

The following focuses on the derivation of the transfer function for the motor and optical tachometer combination.

The above analysis shows that since the motor and the optical tachometer are a second-order system, after considering the effect of the loop filter, the entire control loop is a third-order system. The resulting system model is shown in Figure 3. In Figure 3, the servo amplifier is assumed to be a zero-order system with a gain equal to Ka.

In order to ensure the stability of the whole system, the loop filter must have a zero point (i.e., phase advance correction function). An active proportional integral filter can be used, otherwise the phase of the closed-loop transfer function may exceed 180° at higher frequencies, resulting in system instability.

When designing a motor speed control system, certain parameters are given in advance, such as motor parameters Km, Tm, sector disk teeth number K2, etc. The remaining parameters, such as servo amplifier gain Kα, loop filter parameters τ1, τ2, etc., need to be selected based on the system's optimal dynamic performance and stability performance.

3. Variable range speed signal detection

3.1 Variable-multiplier narrowband tracking circuit based on CD4046

PLLCD4046[4] is a phase negative feedback closed loop circuit composed of a stored edge-triggered frequency-phase detector circuit, a VCO voltage-controlled oscillator, a low-pass filter, etc. The phase detector of this circuit overcomes the defects of the sinusoidal phase detector in terms of nonlinearity and lack of frequency detection function[2-3]. In addition, its synchronous band, capture band and fast capture band are the same, and the capture time is equal to the fast capture time. It has strong capture capability and fast speed when losing lock.

The overall composition of the variable-rate narrowband tracking circuit based on CD4046 is shown in Figure 4. Among them, A1, A2 and their resistors and capacitors form a common-phase active proportional-integrator filter, and the ÷N circuit is an N-times frequency divider. When the active proportional-integrator is used as loop filtering, the phase-locked loop has good narrowband tracking characteristics.

3.2 Measures to improve tracking accuracy

3.3 Frequency doubling principle and controller range classification

The phase-locked loop is a circuit in which a frequency signal has a phase negative feedback. When the phase is locked, the frequency of the input signal and the feedback signal fi are the same, and the phase difference is fixed (related to the form of the phase detector, here it is zero phase difference). The frequency multiplication principle is shown in Figure 5. If an N-frequency divider with a variable frequency division coefficient is connected behind the voltage-controlled oscillator (here the output end of the frequency divider CD4046 is manually switched to obtain different frequency division coefficients), the frequency of the signal fed back to the phase detector is f0/N. When the phase detector is phase-locked, fi=f0/N, that is, f0=Nfi. If the output frequency f0 of the voltage-controlled oscillator is used as the output signal, the purpose of N-frequency multiplication is achieved (that is, f0=Nfi), and the frequency division coefficient N of the frequency divider is the frequency multiplication coefficient of the circuit. For the controller of the developed four-pole motor, it can be divided into three gears: 1500r/min, 750r/min, and 375r/min, then the frequency multiplication coefficients are 16, 32, and 64 respectively, and the corresponding maximum frequency of each gear is 1600Hz. This brings convenience to the design of timing parameters of charge transfer f/v conversion circuit. The controller indicates the motor speed with a tachometer, which is divided into three ranges, making the operation more intuitive and convenient, and the accuracy is higher.

4 Test results

In Figure 4, the frequency divider is short-circuited (i.e., N=1), and the tracking characteristics of the circuit are observed by the instrument. The low-frequency characteristic tester is used as a sweep signal generator, and its output signal is added to the tested circuit instead of the sensor signal fi, and at the same time added to its own input end to observe and adjust the sweep rate. The spectrum of fi and fo is analyzed by a dynamic analyzer and the tracking of the two signals is observed at the same time. The sweep frequency range is set to 200Hz~20kHz, and the sweep rate is full-scale 1.5 seconds to perform circuit function test. The results are shown in Table 1. The obvious error of the first point is that the sweep signal returns to 0 at 20kHz instantaneously, and the discharge of the filter capacitor cannot keep up. This phenomenon does not occur during manual scanning, and there is no such mutation during actual measurement. This sweep speed is equivalent to 20kHz/1.5s=13.3kHz. It can be seen that the frequency tracking performance of the circuit is excellent.

This circuit system has been successfully used in a speed control system with winding characteristics. It has the characteristics of low price, easy production, high signal detection accuracy, and convenient grading. It can be widely used in occasions where the controlled signal frequency changes in a large range and at a high speed.