Research on LED performance and thermal management methods

As we all know, the effective light radiation (luminance and/or radiant flux) of LEDs is seriously affected by their junction temperature (see Figure 1). Single LED packages are usually called primary LEDs, while LED assemblies with multiple LED chips mounted on the same metal substrate are usually called secondary LEDs. When secondary LEDs have high requirements for light uniformity, the problem that junction temperature affects the luminous efficiency of LEDs will be very prominent. Of course, the electrical, thermal, and optical synergistic model of primary LEDs can be used to predict the electrical, thermal, and optical properties of secondary LEDs, but the premise is that the heat dissipation environment of the LEDs needs to be accurately modeled.

In this article, we will discuss how to use structure functions to obtain the thermal model of LED packages through actual measurements, and briefly describe a new test system we use to perform the test. In addition, we will review the principles of electro-thermal simulation tools and then extend this principle to board-level thermal simulation to help optimize the simplified thermal model of the package structure. At the end of the article, we will introduce an application example.

Building a Simplified Thermal Model of an LED Package

The academic community has been discussing the establishment of simplified thermal models (CTM) for semiconductor package components for more than 10 years. Now, the DELPHI approximation method is generally accepted for the establishment of a steady-state simplified thermal model that is independent of boundary conditions for packaged components, especially IC packages. In order to study the transient heat dissipation performance of components, we need to expand the CTM, and the expanded model is called the transient simplified thermal model (DCTM). The European Union has developed a method for establishing DCTM for components through the PROFIT project, and at the same time expanded the functions of thermal simulation tools to enable simulation calculations of DCTM models.

When CTM is applied under specific boundary conditions or the packaged component itself has only one junction-to-ambient heat flow path, the NID (Network Definition of Thermal Resistance) method can be used to model the component.

Directly use the test results to establish the LED package model. Carefully studying a typical LED package and its typical application environment (Figure 2), we will find that the heat generated by the LED chip basically flows out of the LED package through a single heat flow path: "chip-heat sink-MCPCB substrate".

For steady-state modeling, the heat dissipation characteristics of the package can be accurately described by the junction-to-case thermal resistance, which refers to the thermal resistance from the LED chip to the surface of its own package heat sink. For a first-level LED, this thermal resistance value can be obtained by using a thermal transient test instrument to test according to the double contact surface method.

Figures 3 and 4 show another test method. This method uses two steps to complete the test of a secondary LED component. The test conditions of these two steps are: thJCR

The first condition - directly install the MCPCB on the cold plate

The second condition - add a very thin plastic layer between the MCPCB and the cold plate

Since the thermal conductivity of copper and glue is different, the value can be easily read from the structure function curve. At the same time, since the thin layer of material added under the second condition will cause the test curve to separate, the thermal resistance value between the junction and the board can be easily distinguished through the separation point.

If you need to build a transient thermal model for an LED package, you need to use a suitable thermal resistance characteristic curve instead of a fixed thermal resistance value to describe the heat dissipation characteristics of the junction-to-shell heat flow path. The structure function obtained from the thermal transient test can help to establish a transient thermal model. The structure function in integral form is a complete thermal resistance and heat capacitance network diagram. These thermal resistance and heat capacitance values ​​accurately describe the heat dissipation characteristics of the junction-to-environment heat flow path.

The reduced thermal resistance and thermal capacitance values ​​of different physical structures on the heat flow path can be obtained by performing a step approximation on the integral structure function. The NID-based model generation method mentioned here is a discretization based on the time constant. This method has been successfully used to generate models for stacked chips. There are usually multiple heat flow paths in this type of package. When the boundary conditions attached to the package surface are different, the generated step-type RC model cannot be considered as a model independent of the boundary conditions.

For LEDs, there is only one heat flow path inside the package, so the stepped RC model can be used as a very suitable model to describe the thermal performance of LED packages.

From the structure function graphs measured under different actual heat dissipation environments, it can be seen that the thermal model of the LED is independent of the boundary conditions, and changing the test environment (in our case, inserting a thin layer of plastic material) does not affect the part of the structure function that describes the detailed heat dissipation performance inside the package. It is pointed out in the literature that changing the surface contact characteristics of the first-level LED heat sink does not affect the part of the heat flow path that is located before it. Therefore, as shown in Figure 3, the stepped model of a section of the heat flow path before the heat flow enters the MCPCB is suitable for simulating the heat dissipation of a single LED package when we do board-level thermal analysis of a second-level LED similar to that shown in Figure 2 or an LED assembly similar to that shown in Figure 8.

Thermal-optical synergistic testing of LEDs Thermal transient testing of semiconductor devices is based on electrical testing methods. The thermal resistance of conventional components (or thermal resistance characteristic curves in transient conditions) can be calculated using the measured temperature rise of the components and the input electrical energy. However, this method is not suitable for high-power LEDs because 10-40% of the total input electrical energy will be converted into effective visible light output. It is precisely because of this that we need to remove the energy of effective visible light output when using direct testing methods to establish a thermal model for LED packages. To this end, we have designed a test system as shown in Figure 5, which can be used to implement thermal-optical synergistic testing of LED packages.

The device under test is fixed on a thermoelectric cooler, which is installed in an integrating sphere that meets the CIE[13] specifications and recommended settings. When performing optical measurements, the thermoelectric cooler can ensure the temperature of the LED is stable, and when performing thermal tests, it is a cold plate for the LED to dissipate heat. By performing optical tests on LEDs or LED components under the premise that both thermal and electrical conditions remain unchanged, we can obtain the LED luminous power under specific conditions (as shown in Figure 6).

When all the light measurements are completed, we turn off the LED under test and measure its cooling transient using the T3Ster instrument from MicReD. When measuring with the T3Ster, we use the same test instrument settings as when testing diodes.

Thermal transient testing can give the thermal resistance value, so the junction temperature of the component can be calculated by inverse calculation of the temperature of the thermoelectric cooler.

Based on the transient cooling curve and considering the effective light energy output of the component, we can calculate the thermal resistance characteristic curve of the component under test. The thermal resistance characteristic curve can be converted into a structure function curve, from which the CTM model of the LED package can be obtained using the method discussed above.

Board-level electro-thermal simulation

Principle of Electro-Thermal Enclosure Simulation Using Simultaneous Iteration Method We use the simultaneous iteration method to perform electro-thermal simulation of semiconductor components in a circuit.

For active semiconductor devices mounted on substrates (such as transistors on large chips or LEDs on MCPCBs), the independence of boundary conditions of the thermal simplified model is very important, which requires that the contact surface between the substrate and the component itself and the relationship between the substrate and the heat dissipation environment should be as close to the actual application as possible. The substrate model based on boundary conditions can be determined according to the actual application environment. Then, the thermal resistance network containing the component and the substrate can be solved together with the circuit using the synchronous iteration method.

We use the electrical-thermal model of semiconductor components to coordinate the electrical and thermal networks: each component is replaced by a thermal node (see Figure 7). The heat generated by the components drives the entire thermal network model through the thermal nodes. The electrical parameters of the components are related to their temperature and can be calculated based on the calculation results of the thermal network model. Using the relationship between voltage and resistance and the relationship between temperature difference and thermal resistance, the electrical and thermal networks can be solved by simultaneous iteration and a set of closed solutions can be given.

Simplified Thermal Model of Substrate For any simulation tool based on synchronous iteration for electrical-thermal co-simulation, the core issue is how to generate and efficiently handle the dynamic simplified thermal model of the substrate related to the heat dissipation boundary conditions. When dealing with this problem, the thermal network model can be regarded as a network with N ports, and for any of the ports, it corresponds to a semiconductor component (as shown in Figure 7). This N-port model describes the thermal resistance characteristics of a given semiconductor component to the environment through the resistance characteristics of N driving points, and at the same time, uses Nx (N-1) heat transfer thermal resistance to describe the coupled thermal resistance between different components on the same substrate.

The NID method uses time or frequency domain response to generate a simplified thermal model. By using a fast thermal simulation tool to calculate the response curve, you can get a substrate thermal characteristic curve represented by NxN and covering all time constant ranges. Then convert the time constant into RC, and you can use the combination of RC to get a stepped thermal resistance network (the number of steps can be determined according to the required accuracy). This thermal resistance network can be simulated and calculated together with the electrical network using an efficient calculation method.

The board-level extended thermal simulation calculator automatically calculates the thermal time constant for each heat source in the loop. This calculation method is very suitable for chip-level ICs.

When the device's electrical performance is not closely related to temperature, we can use the "thermal simulation only" mode. The thermal simulation calculator can now directly use the DCTM model of the semiconductor package. By simulating the DCTM and the detailed model of the PWB together, we can get the temperature of the component and the substrate.

When performing electro-thermal co-simulation, one usually wants to understand not only the temperature changes, but also the transient effects of temperature on the electrical waveform. We have recently expanded the functionality of the instrument to be suitable for generating DCTM models for electro-thermal simulation of semiconductor components fixed on any substrate. For the N-port network model of the substrate, it can be calculated in the same way as the network model of the chip. When using DCTM to build the model of the package itself, its N-port network model should also take into account the impact of the pin structure on the model.

Place the DCTM model between the substrate position corresponding to the component pin and the position corresponding to the junction of the component's own electro-thermal model, and then use the electro-thermal simulation tool to solve and calculate.

Models of LEDs with different structures

For LED, the heat generation power should be equal to the total input power minus the effective luminous power. This heat should be added to the package.

Power value of the thermal model:

optelheatPPP?=

In our previous research work, we mentioned that for some LEDs, there may be a fixed heat loss caused by the series resistance. Therefore, the total heat should be equal to the sum of the heat generated by the junction and the series resistance:

RoptDheatPPPP+?=

Where is the total input power, is the heat generated by the series resistor. The method for determining this parameter is very simple: we have discussed the method of determining it by collaborative measurement before, and the heat value of the series resistor can also be measured using the same circuit connection method.

The position of the series resistor may be very close to the position of the junction, or it may be very far away. Based on this feature, we can divide the thermal model of the LED into two types: hot resistor type and cold resistor type. The difference between them is that for the hot resistor type, the heat generated by the series resistor will flow along the heat flow path from the junction to the pin together with the heat generated by the junction, while for the cold resistor type, the heat flows along a different path. When establishing the electrical-thermal simulation model of the LED, it is important to pay attention to this difference.

Application Examples

We studied an RGB LED module as shown in Figure 8. The three LEDs in the module are all in standard packages. Even in this case, the junction structures of the green LED and the blue LED are very similar.

We not only conducted a separate thermal transient test but also a thermal-optical synergistic test. The thermal transient test was conducted under two different conditions: a JEDEC standard static test chamber and an additional cold plate. Figure 9 shows the thermal resistance characteristics of the green LED near the driving point measured on a cold plate (Gdriv_CP) and in a static test chamber (Gdriv). In the figure, it can be seen at what temperature and at what thermal resistance value the heat flow path is separated. This test result verifies our previous statement: inside the LED package, it can be assumed that heat flows from the junction to its heat sink along a unique channel. The convection thermal resistance in still air can also be read from the figure. When using a cold plate, the effect of convection can be ignored. GtoR and GtoB are the characteristic curves of the red LED and blue LED measured when the green LED is driven by heating.

We also tested the LED luminous efficiency in an integrating sphere and found that the luminous efficiency of the green LED decreased as the cold plate temperature increased, which is similar to what is shown in Figure 6.

The DCTM model of LED package can be generated through the process mentioned above, and this model can be used for board-level thermal simulation analysis of LED. For the LED model used in the electro-thermal simulation tool, the electrical model part of the model uses a standardized LED electrical model, and its parameters should be determined according to the characteristic parameters of the actual LED component.

We established a thermal model of the LED module containing three LED packages: using 3*3mm squares to replace the round pins of the actual device, we can establish an approximate geometric model of the LED module in the Cartesian coordinate system. The Kaul-type RC network model shown in the figure below is the DCTM model we use to describe the LED package.

The LED module we studied is composed of three LED packages mounted on an aluminum substrate with an area of ​​30*30mm^2 and a thickness of 2.5mm. By mounting the module on a cold plate for testing, we have obtained the thermal model of the module. In order to verify the accuracy of the model, we simulated and analyzed the LED module in a static test box environment, and we have already completed the test work in the static test box environment. The accuracy of the model can be verified by comparing the simulation with the actual measurement.

From Figure 10, we can see that the thermal resistance characteristic curve obtained by simulation is very similar to the measured curve shown in Figure 9. The simulation also accurately predicts the thermal delay phenomenon between the green LED and the other two LEDs: the junction temperature of the blue and red LEDs begins to rise after 1 second. From the time constant of the thermal resistance characteristic representing the driving point in Figure 11, the test results and simulation results are also highly consistent.

It can also be seen from Figure 9 that the time constants representing the components inside the package should be within 10 seconds. Time constants outside 10 seconds represent the heat dissipation environment outside the LED package (MCPCB in the static test box).

summary

This article discusses the testing and simulation techniques of LEDs and LED components under different structures. In the test, we successfully applied a thermal-optical collaborative test method, which can distinguish the amount of heat that actually heats the LED junction when the LED is working. The same test setup can also be used to measure the luminous efficiency of the LED and some of its basic electrical parameters, because these parameters are functions of its junction temperature. At the same time, we introduced a method to directly generate the CTM simplified thermal model of the LED using the results of thermal transient tests. This article successfully extends the chip-level electrical-thermal collaborative simulation method to board-level simulation. When performing board-level simulation, the CTM model of the LED package was successfully applied.