Applicable dedicated power supply

Different applications require different design parameters. System size, efficiency, flexibility and external component count must be considered to suit the end purpose.

Small size is important for integrated circuits used in mobile phones. However, in navigation systems, size is not a critical issue due to the large display and large form factor. The navigation system is designed to operate for only a few hours at a time. The navigation system is fixed to the dashboard of the car and is powered by a 12V adapter connected to the car battery. The adapter usually contains a pre-regulator to provide 5V DC. The input voltage is usually used to charge lithium-ion batteries. The battery charger can be with or without a power path.

For a charger without power circuit, the battery is directly connected to the load and the current provided by the charger is divided between the load and the battery. If the application is turned off and there is no load current, the full current provided by the charger charges the battery. When the application is turned on, the charging current is reduced and part of it is used in the application. However, the current entering the battery cannot be determined, only the total output current of the charger for the battery and the application is known.

Topology

In the second charger topology, a switch separates the battery from the load. If there is no input voltage to the charger, the switch is closed and the battery is connected to the output, powering the application. When an external power source is connected, the switch from the battery to the power supply output is open and a second switch from the charger input to the power supply output is closed. The input voltage is either connected directly to the output or pre-regulated to 100mV above the supply voltage or to a fixed voltage. The second circuit charges the battery independently. Chargers with power path provide the option of limiting the input current (from the car adapter or from the USB bus). The charge current can be set independently. The battery charging current is independent of the load, the charging terminal load is accurate, and if the power is externally supplied, the output voltage can be equal to the input voltage.

The input voltage range of the power supply varies depending on the type of charger used. The minimum operating voltage is usually determined by the minimum voltage of the lithium-ion battery, which can be as low as 3V for a standard lithium-ion battery. The maximum voltage depends on the charger. For a charger without a power path (Figure 1), the maximum voltage is equal to the maximum battery voltage (typically 4.2V). For a charger with a power path (Figure 2), this voltage can rise to more than 5V. Therefore, it is desirable for the power supply to have good efficiency over the entire input range. This is important for power supplies with LDOs (low-dropout linear regulators) integrated on the chip, because their efficiency depends primarily on the voltage across the path element, which is determined by the voltage difference between the input and output voltages.

Figure 1: Charger without power path

Figure 2 Charger with power path

For an integrated circuit solution, the battery charger does not need to be integrated into the power management unit (PMU). The charger can be paired with an appropriate input source and battery. The charger can be placed close to the battery or input connector, while the PMU can be placed close to the processor it is powering.

Integrated Power Supply Options

There are also integrated power solutions for displays and display backlights and audio codecs. Devices that integrate several units become user-specific devices. For example, the TPS65024XPMU (Figure 3) contains three step-down converters dedicated to the I/O, memory, and core voltage of the mobile phone. The other three LDOs provide voltage rails for supply voltages that require very low ripple, or low current. LDO1 and LDO2 can provide 200mA output current, and LDO3 is a dedicated voltage rail (Vdd-alive) that needs to be turned on when the application processor is in sleep mode. The output current capability is 30mA, while the LDO3 supply current is only 10?A, keeping the current from the battery as small as possible in sleep mode.

Figure 3 TPS65024 block diagram

The best choice for all devices is to have low quiescent supply current, not needing to provide any current to the output, but still maintaining the output voltage. This parameter is critical for long operation in standby mode. Low quiescent supply current improves standby time and is also an important parameter for efficiency at very low output currents of DC/DC converters.

High efficiency

The efficiency of a DC/DC converter (i.e., a buck converter) is affected by a factor of 3. At high output currents, the efficiency is dominated by the resistance of the internal power switch, so low resistance is important.

In a buck converter, operating in fixed frequency pulse width modulation (PWM) mode, the duty cycle depends on the input/output voltage ratio. For low output voltages, the internal low-side switch (NMOS) is on for much longer time than the high-side switch (PMOS). For high output voltages, the high-side switch is on most of the time.

For output currents in the 10mA to 200mA range, switch resistance is not the primary consideration for losses, but rather the gate charge of the power switch and the inductor losses determine efficiency. Appropriate switching frequency to output current is a key technique to maintain high efficiency in this operating range, a technique known as pulse frequency mode (PFM). PFM provides a constant energy to the output, resulting in a higher switching frequency at high output currents and a lower switching frequency (with low switching losses) at low output currents. When the converter has very low output currents, the constant losses caused by the quiescent current power supply determine efficiency.

The TPS650240 is optimized for Samsung application processor applications (Table 1), which require 1V (in low-voltage mode) and 1.3V (in normal operating mode) core voltages. To minimize external components, buck converter 1 has a fixed 3.3V or 2.8V output (dedicated to I/O voltages). Converter 2 is for 2.5V or 1.8V memory. The output voltage of converter 3 can vary between 1V and 1.3V, depending on the state of the digital input (DEFDCDC3) (see Figure 4). Therefore, no external components are required to set the voltages of the two buck converters. To maintain flexibility, an external voltage divider can be connected to set the output voltages of converters 1 and 2 in the range of 0.6V to the input voltage (Vbat) (Figure 4).

Figure 4 Setting the output voltage of converter 1 and converter 2

Table 1 TPS65024X functions

The two LDOs in the TPS65024X have a separate input voltage pin that allows any voltage in the range of 1.5V to 6.5V to power the LDOs. LDO3 is internally powered by the input voltage pin Vcc. In addition, the internal voltage comparator can be used to detect if the voltage is below a certain threshold and alert the application processor. All TPS650240X devices are designed to maintain minimum losses at the highest efficiency within the voltage and current range.