With the rapid development of IC technology and the growing demand for consumer electronics, a large number of portable devices are widely used in various fields, making low power consumption an increasingly concerned issue in system design. Power consumption not only directly determines the use time of mobile devices that are usually powered by batteries, but also greatly affects the size, cost and performance of the chip. This article combines the MSP430 series microprocessors to discuss in detail the design method of reducing power consumption by controlling and changing the clock frequency of the MCU.
1 Causes of power consumption
In CMOS circuits, power consumption losses mainly include static power consumption losses and dynamic power consumption losses. Among them, static power consumption is mainly caused by the leakage current of the reverse-biased PN junction and the subthreshold current of the transistor, and its most important form is leakage loss. In fact, in theory, there will be no static power consumption loss in CMOS circuits because there is no direct path from the power supply to the ground, but in fact, there will always be leakage current in transistors, resulting in leakage loss. Under the 0.18μm process level, its proportion in power consumption is about 5% to 10%, which can generally be ignored (but with the improvement of the process and the reduction of the power supply voltage, its proportion will gradually increase). Thus, in CMOS circuits, dynamic power consumption becomes the main component of the system power consumption, accounting for more than 90% of the overall power consumption. Quantitative analysis of the dynamic power consumption of the circuit can be expressed by the following formula:
Where: C is the load capacitance; VDD is the power supply voltage; ? is the flip probability, that is, the number of charge and discharge cycles that occur in each clock cycle; fCLK is the clock frequency. From this formula, we can see how to reduce dynamic power consumption and thus reduce the power consumption of the entire CMOS circuit. That is, we can reduce the flip load capacitance, reduce the power supply voltage, reduce the flip probability of the node, or reduce the clock frequency. This article will focus on how to dynamically reduce the clock frequency to achieve low power design.
2 Dynamic Clock Low Power Management Principle
MCU system design is a very complex process. Under some conditions, all the hardware resources of the entire system may be used, but in some applications, only a small part of the hardware resources may be needed; in some applications, a very high clock frequency may be required, while in other applications, it can work at a very low operating frequency. For example: when the task volume is large, the MCU works at full load, then a higher clock frequency is required, and the power consumption is large; when the task volume is small, the MCU load is light, the required clock frequency is low, and the power consumption can be reduced accordingly. Dynamically configuring the system clock frequency is to dynamically manage the system's operating frequency to reduce the MCU's power consumption without sacrificing system performance.
The MSP430 basic clock module contains the following three clock input sources.
(1) LFXT1CLK low-frequency clock source: generated by the LFXT1 oscillator (as shown in Figure 2). After resetting OSCOff in the status register by software, LFXT1 starts working, that is, the system works at a low frequency. If LFXT1CLK is not used as an SMCLK or MCLK signal, OSCOff can be set by software to disable LFXT1 from working.
(2) XT2CLK high-frequency clock source: generated by the XT2 oscillator. It generates the clock signal XT2CLK, and its operating characteristics are similar to those of the LFXT1 oscillator when it works in high-frequency mode. The XT2 oscillator can be easily set to work or not through software. When XT2CLK is not used as SMCLK or MCLK signal, turn off XT2 and select other clock sources.
(3) DCOCLK Digitally controlled RC oscillator. Generated by the DCO oscillator integrated in the clock module. The DCO oscillator is an RC oscillator whose frequency can be adjusted by software. Its control logic is shown in Figure 3. When the oscillators LFXT1 and XT2 are disabled or fail, the DCO oscillator is automatically selected as the clock source of MCLK. Therefore, system interrupt requests caused by oscillator failure can be responded to, even when the CPU is turned off.
The basic clock module can provide three clock signals required by the system, namely: ACLK, MCLK, and SMCLK. Among them, the auxiliary clock ACLK is obtained by dividing the LFXT1CLK signal by 1, 2, 4, or 8. ACLK can be selected by software as the clock signal of each peripheral module, and is generally used for low-speed peripherals; the system main clock MCLK can be selected by software from one of the three LFXT1CLK, XT2CLK, and DCOCLK, and then divided by 1, 2, 4, or 8. MCLK is mainly used for CPU and system. The subsystem clock SMCLK can be selected by software from LFXT1CLK and DCOCLK, or XT2CLK and DCOCLK, and then divided by 1, 2, 4, or 8, and is mainly used for high-speed peripheral modules. The system can select the appropriate system clock frequency through software according to actual needs. These three clocks of different frequencies are output to different modules, so as to reasonably utilize the system power supply and achieve ultra-low power consumption of the entire system, which is crucial for battery-powered systems. In specific applications, the working status of the CPU and each clock source is shown in Table 1.
4 Dynamic clock application example
Use MSP430 to connect an external 32768Hz crystal to build an ultra-low power real-time clock, as shown in Figure 4.
Some codes are as follows:
setc
Dadc.b SEC
cmp.b #060h, SEC
jlo CLKend
clr.b SEC
dadc.b MIN
cmp.b #060h, MIN
jlo CLKend
clr.b MIN
CLKend;
Make the MSP430 CPU work in a burst state, most of the time in the LMP3 state, only after the unit time in the program code is reached, it will start a very short operation, and the current consumption during the operation is about 250?Zi A. After calculating the instruction execution time, it is found that the program running time in a 1s time period is only 100μs, and the system average current is about 0.83μA, which shows that its working power consumption is quite low.
This article analyzes the dynamic clock configuration of the MSP430 series MCU and introduces how to achieve low power design by dynamically changing the MCU system clock. In practical applications, low power design can be effectively achieved by using the clock source reasonably through software settings.
Reference address:Analysis and application of low power MCU dynamic clock
1 Causes of power consumption
In CMOS circuits, power consumption losses mainly include static power consumption losses and dynamic power consumption losses. Among them, static power consumption is mainly caused by the leakage current of the reverse-biased PN junction and the subthreshold current of the transistor, and its most important form is leakage loss. In fact, in theory, there will be no static power consumption loss in CMOS circuits because there is no direct path from the power supply to the ground, but in fact, there will always be leakage current in transistors, resulting in leakage loss. Under the 0.18μm process level, its proportion in power consumption is about 5% to 10%, which can generally be ignored (but with the improvement of the process and the reduction of the power supply voltage, its proportion will gradually increase). Thus, in CMOS circuits, dynamic power consumption becomes the main component of the system power consumption, accounting for more than 90% of the overall power consumption. Quantitative analysis of the dynamic power consumption of the circuit can be expressed by the following formula:
Where: C is the load capacitance; VDD is the power supply voltage; ? is the flip probability, that is, the number of charge and discharge cycles that occur in each clock cycle; fCLK is the clock frequency. From this formula, we can see how to reduce dynamic power consumption and thus reduce the power consumption of the entire CMOS circuit. That is, we can reduce the flip load capacitance, reduce the power supply voltage, reduce the flip probability of the node, or reduce the clock frequency. This article will focus on how to dynamically reduce the clock frequency to achieve low power design.
2 Dynamic Clock Low Power Management Principle
MCU system design is a very complex process. Under some conditions, all the hardware resources of the entire system may be used, but in some applications, only a small part of the hardware resources may be needed; in some applications, a very high clock frequency may be required, while in other applications, it can work at a very low operating frequency. For example: when the task volume is large, the MCU works at full load, then a higher clock frequency is required, and the power consumption is large; when the task volume is small, the MCU load is light, the required clock frequency is low, and the power consumption can be reduced accordingly. Dynamically configuring the system clock frequency is to dynamically manage the system's operating frequency to reduce the MCU's power consumption without sacrificing system performance.
The MSP430 basic clock module contains the following three clock input sources.
(1) LFXT1CLK low-frequency clock source: generated by the LFXT1 oscillator (as shown in Figure 2). After resetting OSCOff in the status register by software, LFXT1 starts working, that is, the system works at a low frequency. If LFXT1CLK is not used as an SMCLK or MCLK signal, OSCOff can be set by software to disable LFXT1 from working.
(2) XT2CLK high-frequency clock source: generated by the XT2 oscillator. It generates the clock signal XT2CLK, and its operating characteristics are similar to those of the LFXT1 oscillator when it works in high-frequency mode. The XT2 oscillator can be easily set to work or not through software. When XT2CLK is not used as SMCLK or MCLK signal, turn off XT2 and select other clock sources.
(3) DCOCLK Digitally controlled RC oscillator. Generated by the DCO oscillator integrated in the clock module. The DCO oscillator is an RC oscillator whose frequency can be adjusted by software. Its control logic is shown in Figure 3. When the oscillators LFXT1 and XT2 are disabled or fail, the DCO oscillator is automatically selected as the clock source of MCLK. Therefore, system interrupt requests caused by oscillator failure can be responded to, even when the CPU is turned off.
The basic clock module can provide three clock signals required by the system, namely: ACLK, MCLK, and SMCLK. Among them, the auxiliary clock ACLK is obtained by dividing the LFXT1CLK signal by 1, 2, 4, or 8. ACLK can be selected by software as the clock signal of each peripheral module, and is generally used for low-speed peripherals; the system main clock MCLK can be selected by software from one of the three LFXT1CLK, XT2CLK, and DCOCLK, and then divided by 1, 2, 4, or 8. MCLK is mainly used for CPU and system. The subsystem clock SMCLK can be selected by software from LFXT1CLK and DCOCLK, or XT2CLK and DCOCLK, and then divided by 1, 2, 4, or 8, and is mainly used for high-speed peripheral modules. The system can select the appropriate system clock frequency through software according to actual needs. These three clocks of different frequencies are output to different modules, so as to reasonably utilize the system power supply and achieve ultra-low power consumption of the entire system, which is crucial for battery-powered systems. In specific applications, the working status of the CPU and each clock source is shown in Table 1.
4 Dynamic clock application example
Use MSP430 to connect an external 32768Hz crystal to build an ultra-low power real-time clock, as shown in Figure 4.
Some codes are as follows:
setc
Dadc.b SEC
cmp.b #060h, SEC
jlo CLKend
clr.b SEC
dadc.b MIN
cmp.b #060h, MIN
jlo CLKend
clr.b MIN
CLKend;
Make the MSP430 CPU work in a burst state, most of the time in the LMP3 state, only after the unit time in the program code is reached, it will start a very short operation, and the current consumption during the operation is about 250?Zi A. After calculating the instruction execution time, it is found that the program running time in a 1s time period is only 100μs, and the system average current is about 0.83μA, which shows that its working power consumption is quite low.
This article analyzes the dynamic clock configuration of the MSP430 series MCU and introduces how to achieve low power design by dynamically changing the MCU system clock. In practical applications, low power design can be effectively achieved by using the clock source reasonably through software settings.
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