USB/IrDA bridge control chip STIr4200S

Publisher:科技独行者Latest update time:2006-05-07 Reading articles on mobile phones Scan QR code
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    Abstract: A new ASIC developed by SigmaTel specifically for bridge control between USB and IrDA: STIr4200S is introduced in detail from the functional block diagram, pin description, frame format, register and its control instructions.

    Keywords: Infrared wireless data communication USB IrDA STIr4200S

STIr4200S is a new ASIC developed by SigmaTel specifically for bridge control between USB and IrDA. It adopts a low-power CMOS design and is fed directly from the USB port. It integrates a 4K-byte FIFO buffer on-chip and is packaged in a 28-pin SSOP. The IrDA data transfer rate ranges from 2.4 Kbps to 4 Mbps and is mainly used to achieve infrared wireless data communication through the USB port.

1 Functional block diagram

   The functional block diagram is shown in Figure 1. Generally speaking, STIr4200 consists of two parts: USB controller and digital infrared transmitter. The USB controller provides a control endpoint, a batch data input endpoint and a batch data output endpoint to the USB host. The digital infrared transmitter consists of a sending interface and a receiving interface, which are connected to the analog infrared transceiver.

2 pin description

   The STIr4200S pin arrangement is shown in Figure 2.

   The STIr4200S pin description is listed in Table 1.

Table 1 STIr4200S pin description

Pin number signal name type describe Pin number signal name type describe
1 TXDIODE GND PWR TXDIODE power supply ground 15 NC - hanging in the air
2 TXDIODE O Optional LEXD excitation output 16 NC - hanging in the air
3 NC - hanging in the air 17 D POS IO USB interface (+) data
4 NC - hanging in the air 18 VDA PWR USB transmitter powered (+)
5 RXFAST I Receive data from IR module (fast mode) 19 U IN I/O test
6 TXDATA O Chiang data is sent to the infrared module 20 TST_CLK I Test clock input
7 RXSLOW I Receive data from infrared module (slow mode) twenty one TSTD I/O Test data input and output
8 U OUT O SD/mode control twenty two TST_EN I test enable
9 DGND PWR Digital power ground twenty three RESETZ I master reset
10 VDD PWR Digital power (+) twenty four GNDD PWR power ground
11 AGND PWR USB transmission power supply ground 25 XTALI I 12MHz crystal oscillator input
12 D NEG I/O USB interface (-) data 26 XTALO O 12MHz crystal oscillator output
13 NC - hanging in the air 27 NC - hanging in the air
14 NC - hanging in the air 28 NC - hanging in the air

3 Instructions

   The STIr4200S provides users with an instruction set that allows reading and writing the registers of the digital IR transmitter as well as the ROM of the USB controller through the USB driver. Its instruction set is detailed below.

   (1) Write multiple register instructions

   The write multiple registers instruction allows the user to write multiple consecutive registers of the digital IR transmitter. The instruction format is listed in Table 2. Each register is 1 byte long, and the command gives the first register to be read and written, the number of consecutive registers to be read and written, and the data cycle in which the data is written.

Table 2 Description of instructions for writing multiple registers

Offset Field name length/byte value (hex) describe
0 BmRequestType 1 0x40 Request type
1 Brequest 1 0x00 Write multiple registers
2 Wvalue 2 Not used  
4 Windex 2 0x0001-000f The first register to be written
6 Wlength 2 0x0001-0x000f Number of registers to be written

Table 3 Write 1 register instruction description

Offset Field name length/byte value (hex) describe
0 BmRequestType 1 0x40 Request type
1 Brequest 1 0x03 write a register
2 Wvalue 2 LSB contains data Data to be written
4 Windex 2 0x0001-000f The first register to be written
6 Wlength 2 Not used  

Table 4 Description of instructions for reading multiple registers

Offset Field name length/byte value (hex) describe
  BmRequestType 1 0xc0 Request type
1 Brequest 1 0x01 Read multiple registers
2 Wvalue 2 Not used  
4 Windex 2 0x0001-000f First register to read
6 Wlength 2 0x0001-0x000f Number of registers to be read

Table 5 Read ROM instruction description

Offset Field name length/byte value (hex) describe
0 BmRequestType 1  0xc0 Request type
1 Brequest 1  0x02 Read ROM
2 Wvalue 2  Not used  
4 Windex 2  0x0001-0x00ff ROM base address
6 Wlength 2  0x01-0x0040 Number of ROM bytes to be read (< or = 64 bytes)

   (2) Write a register instruction description, as listed in Table 3.

   (3) Instructions for reading multiple registers are listed in Table 4.

   (4) Read ROM instruction instructions, as listed in Table 5.

   The read ROM command allows the DRIVER to read the ROM in USB controller endpoint 0. This is mainly used to verify the contents of the ROM during debugging. Up to 64 bytes can be read at a time.

4 Digital infrared transmitter

   Digital IR transmitter that receives digital input from an analog IR transceiver. It is mainly composed of transmitting modulator, receiving demodulator, FIFO, analog transmission part and register group, as shown in Figure 3. You can operate the device by setting the register value, such as modulation mode, baud rate, frame size in FIFO, and RX input mode. The size of the FIFO is 4 K bytes.

   The data sent to the TX modulator by the USB controller must form an IrLAP frame. The format of an IrLAP frame consists of the following parts. Among them, BOF is the frame start flag, A is the address field, C is the control field, I is the information field, FCS is the CRC check code of the frame, and EOF is the end of frame flag.

BOF A C I FCS EOF

   In addition, before the content in the FIFO is sent to the USB controller, a 2-byte ID code and a 2-byte frame size must be added to the message.

5 frame format

   In order to identify the boundaries of infrared transmission frames, some special characters are used in the frame format, as listed in Table 6. When these characters appear in the data area, they must be escaped. At the same time, because during the transmission process, the boundary of the USB bulk data input/output buffer may not be aligned with the boundary of the infrared transmission frame, therefore, a character 0x7D is also defined in the frame format for actual frame boundary description. Additionally, 0x7F is introduced as a pre-sync character in FIR mode.

5.1 Frame format in SIR mode

   The transmission rate in SIR mode can be 2.4, 9.6, 19.2, 38.4, 57.6 and 115.2 Kbps. The frame format is shown in Figure 4 and Figure 5.

5.2 Frame format in MIR mode

   The transmission rate in MIR mode can be 576 Kbps and 1.152 Mbps. The frame format is shown in Figure 6 and Figure 7.

5.3 Frame format in FIR mode

   The transmission rate in FIR mode is 4 Mbps, and the frame format is shown in Figure 8 and Figure 9.

6 Register settings

   There are 16 registers in the digital infrared transmitter, as listed in Table 7. The working mode, baud rate, etc. of the digital infrared transmitter can be set, and its working status can also be obtained by accessing the status register. The following describes the settings of each register except the test register and DPLL register in detail. The test register and DPLL register are only used for manufacturer debugging.

Table 6 Description of escape characters

Transmission mode original character Representation in data area function
SIR 0xC0 0x7D 0xE0 BOF (start of frame identifier)
0xC1 0x7D 0xE1 EOF (end of frame flag)
0x7D 0x7D 0x5D Actual frame boundary identifier
MIR 0x7E 0x7D 0x5E BOF (start of frame identifier)
0x7E 0x7D 0x5E EOF (end of frame flag)
0x7D 0x7D 0x5D Actual frame boundary identifier
FIR 0x7F 0x7D 0x5F Transmission frame pre-synchronization
0x7E 0x7D 0x5E BOF (start of frame identifier)
0x7E 0x7D 0x5E EOF (end of frame flag)
0x7D 0x7D 0x5D Actual frame boundary identifier

Table 7 Description of registers in digital IR transmitter

Offset describe access bit status
7 6 5 4 3 2 1 0
0 FIFO data register Read and write reserve
1 mode register Read and write FIR MIR SIR ASK FASTRXEN FFRSTEN FFSPRST PDCLK
2 baud rate register Read and write PDCLK(7..0)
3 control register Read and write SDMODE RXSLOW DLOOP1 TXPWD RXPWD RXPWD TXPWR(1:0) SRESET
4 Sensitivity register   RXDSNS(2:0) BSTUFF R/W SPWIDTH R/W ID(2)RO ID(1)RO ID(0)RO
5 status register   EPFRAME RO FFUNDERROC FFOVER ROC FFDIR RO FFCLRWO FFEMPTY RO FFRXERRROC FFTXERRROC
6 FIFO count register (LSB) read only FFCNT(7..0)
7 FIFO master register (MSB) read only 0 0 0 FFCNT(12:8)
8 DPLL adjustment register read only DPCNT(5:0) LONGP(1:0)
9 IRDIG initial register Read and write RXHIGH TXLOW reserve reserve reserve reserve reserve reserve
10 reserve Read and write reserve
11 reserve Read and write reserve
12 reserve Read and write reserve
13 reserve Read and write reserve
14 reserve Read and write reserve
15 test register Read and write PLLDWN LOOPIR LOOPUSB TSTENA TSTOSC (3:0)

Table 8 Mode register setting instructions

address mnemonic operate Function
7 FIR Read and write Set IR modulator to fast mode
6 MIR Read and write Set IR modulator to medium speed mode
5 SIR Read and write Set IR modulator to slow mode
4 ASK Read and write Set the IR modulator to phase shift keying mode
3 FASTRXEN Read and write Simultaneous read and write FIFO enabled
2 FFRSTEN Read and write Make the FIFO receive shift register automatically reset in FIR mode
1 FFSPRST Read and write Manual reset FIFO shift register
0 PDCLK(8) Read and write The highest bit of the baud rate register

Table 9 Baud rate register setting instructions

Transmission mode Baud rate/kbps mode register baud rate register
FIR 4000.0 0x80 0x20
MIR 1152 0x40 0x01
576 0x40 0x03
SIR 115.2 0x20 0x09
57.6 0x20 0x13
38.4 0x20 0x1D
19.2 0x20 0x3B
9.6 0x20 0x77
2.4 0x21 0xDF

Table 10 Sensitivity register setting instructions

address mnemonic operate Function
7-5 RXDSN(2:0) Read and write Used to set the sensitivity of the DRS demodulator
value FIR MIR SIR
000 1 1 4
001 2 2 8
010 3 3 12
011 4 4 16
100 5 5 20
101 illegal 6 twenty four
110 illegal 7 28
111 illegal illegal illegal
4 BSTUFF Read and write Block IRDA data for MIR mode
3 SPWIDTH Read and write When it is 0, the SIR transmission pulse width is 1.6us; when it is 1, it is 0.3us
2-0 ID(2:0) Read and write Chip version number

Table 11 Status register setting instructions

address mnemonic operate Function
7 EOFRAME read only Indicates that the entire frame has been completely loaded into the FIFO
6 FFUNDER read only FIFO underrun error
5 FFOVE read only FIFO overrun error
4 FFDIR read only When it is 1, the FIFO is in transmit mode: when it is 0, it is in receive mode
3 FFCLR just write When it is 1, clear the FIFO and set its pointer to 0. When performing FIFO operation, it must be set to 0
2 FFEMPTY read only When 1, there is no data in the FIFO
1 FFRXERR read only When it is 1, it indicates that an error occurred when the infrared reception was writing to the FIFO.
0 FFTXERR read only When it is 1, it indicates that there was an error when writing the infrared transmitter to the FIFO.

Table 12 IRDIG initial register setting description

address mnemonic operate Function
7 RXHIGH Read and write When set to 1, the polarity of the data on the RXFAST and RXSLOW pins will be inverted.
6 TXLOW Read and write When set to 1, the data polarity of the TXDATA pin will be inverted.
5-0 reserve Read and write Not written

   (1) FIFO data register

   The default setting is 0x00, which is used for data entering the FIFO from the USB interface, but this register is rarely used. Because under normal circumstances, USB can operate FIFO through Bulk read/write instructions.

   (2) Mode register

   The default status is 0x20. Setup instructions are listed in Table 8.

   (3) Baud rate register

   This 8-bit register is full of PDCLK bits, with a default value of 0x77. Table 9 Set the IrDA transmission mode by setting the mode register and baud rate register.

   (4) Control register

   The default value is 0x00. Bit7 is the SDMODE bit. This bit is only used when the STIr4200S is connected to a TEMIC type infrared transmitter to set the infrared transmitter to a power-saving state. Bit6 is the RXSLOW bit. When set to 1, RXSLOW is used to receive the input signal; when set to 0, RXFAST is used to receive the input signal. Bit5 is the DLOOP1 bit. When set to 1, it means connecting the infrared transmitter to the infrared receiver. This bit cannot be used for the STIr4200S integrated solution. Bit4 is the TXPWD bit. When set to 1, the infrared modulator power supply will be stopped. Bit3 is the RXPWD bit. When set to 1, it means to stop the infrared demodulator power supply. Bit2~1 is the TXPWR(1:0) bit, which is used to set the internal pull-down resistor to control the current of the transmission diode: 00 means setting it to the maximum current, 01 means setting it to medium-high current, 10 will set it to medium-low current, and 11 means setting it to the minimum current. Bit0 is the SRESET bit. When set to 1, the infrared modem will be reset.

   (5) Sensitivity register

   The default value is 0x26, and the specific setting rules are listed in Table 10.

   (6) Status register

   The default value is 0x14, and the setting instructions are listed in Table 11.

   (7) IRDIG initial register

   IRDIG is mainly used to set the pin polarity connecting the infrared transmitter and the front-end infrared analog transceiver. The setting instructions are listed in Table 12.

Conclusion

   This article introduces the principle and structure of a USB/IrDA bridge control chip STIr4200S. The chip integrates the protocol conversion function between USB and IrDA. The communication protocol fully complies with USB1.1 spec and IrDA spec, and the communication speed can reach 4 Mbps.

Reference address:USB/IrDA bridge control chip STIr4200S

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