Application circuit design of single-phase inverter intelligent power module

Publisher:ph49635359Latest update time:2010-01-13 Source: 国外电子元器件Keywords:IPM Reading articles on mobile phones Scan QR code
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1 Introduction

Intelligent Power Module (IPM) is increasingly widely used in the field of power electronics due to its advantages such as fast switching speed, low loss, low power consumption, multiple protection functions, strong anti-interference ability, no need to take anti-static measures, and small size. Taking PM200DSA060 IPM as an example, this paper introduces the IPM application circuit design and its application in single-phase inverters.

2 Structure of IPM

IPM is composed of high-speed, low-power IGBT, optimal gate driver and protection circuit. Among them, IGBT is a combination of GTR and MOSFET, and GTR is driven by MOSFET. Therefore, IPM has the advantages of GTR's high current density, low saturation voltage, high withstand voltage, MOSFET's high input impedance, high switching frequency and low driving power.

According to the configuration of the internal power circuit, there are many types of IPM, such as PM200DSA060: IPM is D type (two IGBTs are integrated internally). Its internal function block diagram is shown in Figure 1, and its internal structure is shown in Figure 2. There are drive and protection circuits inside, and the protection functions include control power undervoltage lockout protection, overheat protection, overcurrent protection and short circuit protection. When any of these protection functions is activated, IPM will output a fault signal FO.

The internal circuit of IPM does not contain signal isolation circuit to prevent interference, self-protection function and surge absorption circuit. In order to ensure the safety and reliability of IPM, you need to design some peripheral circuits by yourself.

3 IPM external drive circuit design

The external drive circuit of IPM is the interface between the internal circuit of IPM and the control circuit. A good external drive circuit is of great significance to the operating efficiency, reliability and safety of the system composed of IPM.

As can be seen from the internal structure diagram of the IPM, the device itself contains a drive circuit. Therefore, it is sufficient to provide a PWM signal that meets the drive power requirements, a drive circuit power supply, and an electrical isolation device to prevent interference. However, the IPM has very strict requirements on the output voltage of the drive circuit: the drive voltage range is 13.5V~16.5V. If the voltage is lower than 13.5V, undervoltage protection will occur. If the voltage is higher than 16.5V, internal components may be damaged; the drive signal frequency is 5Hz-20kHz, and an electrical isolation device must be used. To prevent interference: the drive power insulation voltage is at least twice the reverse withstand voltage value of the IPM poles (2Vces); the drive current is 19mA-26mA; the filter capacitor at the output end of the drive circuit cannot be too large. This is because when the parasitic capacitance exceeds 100pF, noise interference may trigger the internal drive circuit by mistake.

Figure 3 shows a typical high-reliability IPM external drive circuit solution. The PWM signal from the control circuit is limited by R1. It is then isolated and amplified by a high-speed optocoupler and connected to the IPM internal drive circuit to control the operation of the switch tube. The FO signal is also output through optocoupler isolation. The control power supply end of each switch tube uses an independent isolated 15V power supply and a 10μF decoupling capacitor (not shown in the figure) is connected to filter out common-mode noise. R1 is selected according to the output current of the control circuit. If DSP is used to generate PWM, the resistance value of R1 can be 330Ω. R2 is selected according to the IPM drive current. On the one hand, it should be as small as possible to avoid the high-impedance IPM picking up noise. On the other hand, it must be sufficiently reliable to control the IPM. It can be selected within 2kΩ~6.8kΩ. C1 is a 0.1μF filter capacitor between the 2nd terminal and the ground. The requirement for the PWM isolation optocoupler is tPLH<0. 8μF, trm < 0.8μF, CMR > 10kV/μs, high-speed optocouplers such as HCPIA503, HCPIA504, PS2041 (NEC) can be used, and a 0.1μ decoupling capacitor (not shown) can be connected to the input end of the optocoupler. The FO output optocoupler can use a low-speed optocoupler (such as PC817). The internal pin functions of the IPM are shown in Table 1.


The external interface circuit in Figure 3 is directly fixed on the PCB and close to the module input pin to reduce noise and interference. The wiring distance on the PCB should be appropriate to avoid potential changes caused by interference during switching.

In addition, considering that strong electricity may cause interference from the external drive circuit to the IPM leads, filter capacitors can be added between pins 1 to 4, 3 to 4, and 4 to 5 according to the size of the interference.

4 IPM protection circuit design

Since the protection circuit provided by IPM itself does not have self-protection function, the auxiliary circuit of peripheral hardware or software is required to convert the internal FO signal into a control signal to block IPM and shut down IPM to achieve protection.

4.1 Hardware

When the IPM fails, FO outputs a low level, which reaches the hardware circuit through a high-speed optocoupler, shuts off the PWM output, and thus protects the IPM. The specific hardware connection method is as follows: A 3-state transceiver with a control terminal (such as 74HC245) is placed in front of the PWM interface circuit. The PWM signal is sent to the IPM interface circuit after passing through the 3-state transceiver. The fault output signal FO of the IPM is sent to the NAND gate through the optocoupler isolation output. Then it is sent to the 3-state transceiver enable terminal OE. When the IPM works normally, the NAND gate output is low level. The 3-state transceiver is selected; when the IPM fails, the NAND gate output is high level. All outputs of the 3-state transceiver are set to high impedance. Block the control signals of each IPM. Turn off the IPM. To achieve protection.

4.2 Software

When the IPM fails, FO outputs a low level, and the FO signal is sent to the controller for processing through a high-speed optical coupler. After the processor confirms, the PWM control signal of the IPM is turned off by interrupt or software, thereby achieving the purpose of protection. For example, in a system based on DSP control, the power drive protection pin (PDPINT) interrupt in the event manager is used to protect the IPM. Usually, the multi-channel PWM generated by an event manager can control the operation of multiple IPMs. Each switch tube can output a FO signal, and the FO signal of each switch tube passes through an AND gate. When any switch tube fails, it outputs a low level, and the AND gate outputs a low level. Connect this pin to PDPINT. Since the DSP is interrupted when PDPINT is low, all event manager output pins are set to high impedance by hardware, thereby achieving the purpose of protection.

The above two solutions both utilize the IPM fault output signal to block the IPM control signal channel, thus making up for the insufficiency of IPM's own protection and effectively protecting the device.

5 IPM buffer circuit design

In IPM applications, the di/dt, dv/dt and instantaneous power consumption generated by the high-frequency switching process and the parasitic inductance of the power circuit will have a great impact on the device and easily damage the device. Therefore, a buffer circuit (i.e., absorption circuit) is required to change the switching trajectory of the device, control various transient overvoltages, reduce the switching loss of the device, and protect the safe operation of the device.

Figure 4 shows three commonly used IPM snubber circuits. Figure 4(a) is a snubber circuit composed of a single non-inductive capacitor, which is effective for transient voltage and low cost, and is suitable for low-power IPM. Figure 4(b) is a snubber circuit composed of RCD, which is suitable for higher-power IPM. Snubber diode D can clamp transient voltage, thereby suppressing parasitic oscillations that may be caused by bus parasitic inductance. Its RC time constant should be designed to be 1/3 of the switching cycle, that is, r=T/3=1/3f. Figure 4(c) is a snubber circuit composed of P-type RCD and N-type RCD, which is suitable for high-power IPM. The function is similar to the snubber circuit shown in Figure 4(b), and its loop inductance is smaller. If the snubber circuit shown in Figure 4(a) is used at the same time, the stress of the snubber diode can be reduced, and the snubber effect is better.


In Figure 4(c), when the IGBT is turned off, the load current charges the snubber capacitor through the snubber diode, and the collector current gradually decreases. Since the voltage at both ends of the capacitor cannot change suddenly, the IGBT collector voltage rise rate dv/dt is effectively limited. It also prevents the collector voltage and collector current from reaching their maximum values ​​at the same time. The energy stored in the IGBT collector bus inductance, the circuit and the stray inductance inside the components when the IGBT is turned on is stored in the snubber capacitor. When the IGBT is turned on, the collector bus inductance and other stray inductances effectively limit the IGBT collector current rise rate di/dt. It also prevents the collector voltage and collector current from reaching their maximum values ​​at the same time. At this time, the snubber capacitor discharges through the external resistor and the IGBT switch, and the stored switching energy is dissipated on the external resistor and the resistor inside the circuit and components. In this way, the switching loss generated during the operation of the IGBT is transferred to the snubber circuit. Finally, it is dissipated in the form of heat on the relevant resistors, thereby protecting the safe operation of the IGBT.

The resistance and capacitance values ​​in Figure 4 (c) are selected according to empirical data: for example, the capacitance value of PM200DSA060 is 0.221xF~0.47xF, the withstand voltage value is 1.1 times~1.5 times that of IGBT, the resistance value is 10Ω-20Ω, and the resistance power is calculated according to P=fCU2xlO-6, where f is the operating frequency of IGBT and u is the operating peak voltage of IGBT. C is the capacitance in series with the snubber circuit and the resistor. The diode uses a fast recovery diode. In order to ensure the reliability of the snubber circuit, the packaged snubber circuit shown in Figure 4 can be selected according to the power size.

In addition, since the bus inductance, the stray inductance of the snubber circuit and its components have a great influence on the IPM, especially the high-power IPM, the smaller the better. To reduce these inductances, it is necessary to take multiple measures: the DC bus should be as short as possible; the snubber circuit should be as close to the module as possible; low-inductance polypropylene non-polar capacitors, fast snubber diodes matching the IPM and non-inductive discharge resistors should be selected.

6 Application of IPM in single-phase full-bridge inverter

The single-phase full-bridge inverter circuit shown in Figure 5 is mainly composed of an inverter circuit and a control circuit. The inverter circuit includes an inverter full bridge and a filter circuit, wherein the inverter full bridge completes the conversion from DC to AC. The filter circuit filters out the harmonic components to obtain the required AC power; the control circuit completes the control of the switch tube in the inverter bridge and realizes some protection functions.

The inverter full bridge in the figure consists of 4 switch tubes and 4 freewheeling diodes. When working, the switch tubes are switched on and off under high frequency conditions. At the moment of switching, the voltage and current of the switch tubes increase, the loss is large, the junction temperature rises, and the parasitic inductance, oscillation and noise of the power circuit are added. It is very easy to cause instant damage to the switch tubes. In the past, discrete components were often used to design the protection circuit and drive circuit of the switch tube, resulting in a large and unreliable circuit.


The author uses a pair of PM200DSA060 dual-unit IPM modules to replace the Vl, D1, V2, D2 combination and V3, D3, V4, D4 combination in the figure to form a full-bridge inverter circuit. Using DSP to control IPM, the design and debugging of the medium frequency 20kW, 230V inverter are completed. The drive circuit mentioned above, the buffer circuit in Figure 4 (c) and the software IPM protection circuit based on DSP control are used. Design practice shows that the use of IPM can simplify the system hardware circuit, shorten the system development time, improve reliability, reduce the size, and improve the protection capability.

Keywords:IPM Reference address:Application circuit design of single-phase inverter intelligent power module

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