Development of Passive Lossless Soft Switching Power Factor Correction Circuit

1 Introduction

Introducing the power factor correction (PFC) technology in the switching power supply can, on the one hand, make the power input current and input voltage waveform in phase, that is, the power factor tends to 1; on the other hand, make the input current a sine wave, that is, the total harmonic distortion value is as small as possible. At present, in engineering applications, traditional active power factor correction circuits mainly include hard switch Boost correction, active soft switch correction, passive lossless soft switch correction and new bridgeless mode correction. Among them, the passive lossless soft switch power factor correction circuit uses a small number of components, a simple circuit structure, good circuit working stability, small current stress of the switch tube, high efficiency, simple control circuit and low cost. Therefore, this design adopts a passive lossless soft switch power factor correction circuit, and Figure 1 is its circuit schematic.

2 Design of PFC power stage circuit based on passive lossless soft switching

The power stage circuit adopts passive lossless soft switching power factor correction circuit, and the operating frequency is set to 60 kHz. The main technical indicators of the design are: input AC voltage of 170-270 V, 50 Hz; output DC voltage of 400 V, voltage ripple less than 10 V: output power 1 kW; power factor not less than 0.98; efficiency not less than 95%.

2.1 Design of main circuit boost inductor

In PFC circuits, magnetic components have a great impact on circuit performance, and their design involves many factors. The following mainly introduces the design of the main circuit boost inductor.

At present, the magnetic core material suitable for APFC inductors working under high frequency conditions and with moderate price is the iron silicon aluminum magnetic powder core. Its advantages are: extremely high saturation flux density, under strong magnetic field conditions, that is, when working at high current, the magnetic core is not easy to saturate; no air gap is needed to make APFC inductors, and electromagnetic interference (EMI) will not be generated to the circuit; due to its good DC bias dynamic linearity, the inductance value at rated current can be accurately controlled by calculation, and the appropriate selection of the magnetic core size and the number of coil turns can reduce the magnetic core loss. According to the technical indicators of the prototype design, the iron silicon aluminum magnetic core is selected. The specifications of the magnetic core are mainly determined by parameters such as power, operating frequency, output voltage and current. To determine the specifications of the magnetic core, the inductance and other parameters must be calculated first. There are many ways to calculate the Boost boost inductor of the PFC circuit. Here, two methods are used to comprehensively analyze and determine the value of the inductance. The commonly used method and the inductance are calculated according to the ripple ratio requirements. Finally, the inductance is calculated to be 1.5 mH. The specifications of the magnetic core are determined by the AP method. The inductor can store energy:

In the formula, BW is the working magnetic induction intensity, taking BW=0.4 T; K0 is the window area utilization coefficient, generally taking 0.4; J is the current density, taking 500 A/cm2.

Substituting the above data into the calculation, we get: AP = 12.75 cm4. We select two magnetic rings of Arnold company model MS-184060-2 to be stacked. At this time, AP = 17 cm4> 12.75 cm4. The inductor wire diameter is calculated as follows:

Calculate the bare wire area:

Considering the difficulty of winding, three wires with a diameter of 1.0 mm are selected and wound together. The cross-sectional area of ​​each wire is 0.007 9 cm2, so the cross-sectional area of ​​the three wires is 0.024 cm2, which is larger than the required area of ​​0.023 cm2.

Inductor turns calculation:

Where L0 is the static inductance, 1.5 mH; μ is the magnetic permeability of the core, μ=60; N is the number of turns, calculated to be N=77, Ae is the cross-sectional area of ​​the core, 3.98 cm2; le is the magnetic path length of the core, 10.74 cm.

By checking the inductance, iron loss and copper loss, each inductance parameter meets the design requirements.

2.2 Design of other components of the main circuit

When selecting a power switch tube, the switching speed of the power device and the simplicity and cost-effectiveness of the drive circuit should be considered. The model should be selected according to the size of its current and voltage stress. In this circuit, the voltage stress borne by the main power switch tube is the output voltage of 400V, and the current stress is the peak current of the resonant inductor of 11.55A. Taking 1 times the margin, a 500V/30A MOSFET can meet the requirements. The power switch tube of this design is SPW47N60C3. The output diode is mainly selected based on parameters such as switching speed, voltage stress, and current stress. This design uses IXYS's DSEI60-06 (600V/60A). Considering the current and voltage margin, the input rectifier bridge is selected as D35XB60 (35A/600V).

3 PFC control stage circuit design

With the PFC dedicated control device UC3854BN as the control core, the PFC control and circuit are shown in Figure 2.

3.1 PWM frequency setting

In this circuit, the operating frequency of the oscillator is set to 60 kHz. This frequency is determined by the capacitor CT and the resistor RSET (R36). Assuming RSET = 16 kΩ, CT can be 300 pF/63 V (C57) and 1 000 pF/63 V (C42) in parallel. At this time, the operating frequency is slightly higher than 60 kHz.

3.2 Design of Current Error Amplifier and Voltage Error Amplifier

In order to make the average current control circuit work stably, the slopes of the two input signals of the PWM comparator must meet the following requirements: the slope of the voltage drop generated by the inductor current in the sampling resistor cannot exceed the rising slope of the sawtooth wave, otherwise the PWM comparator will not work properly. This requirement limits the upper limit of the gain of the current amplifier at the switching frequency. For the voltage error amplifier, its design should determine the ripple voltage on the output capacitor and reasonably distribute the proportion of the harmonic source.

3.3 Driving circuit design

According to the design value of the actual drive circuit, when the switch tube works at 60 kHz, the required drive pulse rise time is about 110 ns, and the selected MOSFET input capacitance Ciss = 6 800 pF. Since the continuous gate drive current of UC3854BN is 0.5 A, and the gate drive current is 1.5 A at a 50% duty cycle, in high-power PFC applications, the drive capability of UC3854BN itself is insufficient, and the di/dt is relatively small when the switch tube is turned on, which increases the conduction loss of the switch tube. Therefore, a power MOSFET driver TC4424 is added in front of the switch tube. Considering the large drive current, two channels of TC4424 are connected in parallel to provide a drive capability of 3 A, as shown in Figure 3.

In addition, the system's protection circuits include input overvoltage and undervoltage protection, output overvoltage and undervoltage protection, overcurrent and short circuit protection, overheating protection, startup protection, etc.

4 Conclusion

In summary, a 1 kW prototype is completed. Figure 4 shows the input voltage and current waveforms. When the load is full, the output voltage change curves during loading and unloading are shown in Figures 5 and 6 respectively.

The test results show that the input power factor of the power factor correction device reaches 98%, the efficiency reaches 97%, and all design indicators are well achieved.