Understanding and Designing Wideband Output Networks for High-Speed ​​D/A Converters

Publisher:快乐舞蹈Latest update time:2015-01-31 Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere
Today, the demand for new IC components and technologies continues to grow at an astonishing rate. The commercial and defense industries are the main drivers of demand growth. Most of the new specifications involving the semiconductor industry today revolve around reducing size, weight, and power - that is, SWaP. In the semiconductor industry, we meet these requirements through continuous improvement of technology and more clever design. However, performance is also a key requirement, especially for digital-to-analog converter (DAC) technology in the GSPS field. In order to keep up with this pace, people often overlook the critical analog output matching network.

To provide higher clarity, high frequency is generally considered to be frequencies over 1 GHz and high speed is speeds over 1 GSPS; more importantly, the end user may integrate an amplifier after the DAC, so the available signal is less dependent on signal level and more dependent on noise and fidelity. This article will discuss matching components and their interconnections, and focus on key specifications when selecting a transformer or balun, as well as application connection configuration tips. Finally, this article will provide some ideas and optimization tips on how DACs operating in the GHz region can achieve broadband smooth impedance transformation.

Background Information

DACs are used in a wide variety of applications, the most common of which include high-frequency complex waveform generation in commercial and military communications, wireless infrastructure, automatic test equipment (ATE), and radar and military jammer electronics. Once the system architect has found the right DAC, they must consider the output matching network to maintain the signal structure. Component selection and topology are more important than ever before, as GSPS DAC applications require operation at super-Nyquist frequencies, where the desired spectral information is in the second, third, or fourth Nyquist zones.

Prerequisites

First let's examine the role of the DAC and its place in the signal chain. The DAC acts much like a signal generator. It can provide a single tone for a complex waveform within a range of center frequencies (Fc). Historically, the maximum Fc was located in the first Nyquist zone, or half the sampling frequency. Newer DAC designs have internal clock multipliers that effectively double the first Nyquist zone; this is referred to as "mixing mode" operation. The natural output frequency response of a DAC using mixing mode has the shape of a sinX/e^(X^2) curve, as shown in Figure 1.

System architects can refer to product data sheets to understand component performance. Many times, performance parameters such as power level and spurious-free dynamic range (SFDR) are given at multiple frequencies. A wise system designer can use the same DAC in the super-Nyquist zone described above. It is worth noting that the expected output level will be much lower at higher frequencies (or in the higher region), so many signal chains will integrate an additional gain block or driver amplifier after the DAC to compensate for this loss.

 

 

Figure 1: DAC Sinx/x output frequency response vs. mixing mode

Component considerations, such as selecting an output balun

Only the best performing GSPS DAC designed and measured by the end user is a good device. To maximize the performance of a high-quality DAC, only the best components should be selected. Important circuit decisions must be made at the outset. Does the data sheet DAC performance provide sufficient output power? Are active devices required? Does the signal chain need to go from the DAC differential output to a single-ended environment? Is a transformer or balun required? What is the appropriate impedance ratio for a balun? This article will focus on the use of a balun or transformer.

When selecting a balun, phase and amplitude imbalance should be carefully considered. Impedance ratio (i.e., voltage gain), bandwidth, insertion loss, and return loss are also important performance considerations. Designing with a balun is not always straightforward. For example, the characteristics of a balun change with frequency, which can cloud expectations. Some baluns are sensitive to grounding, layout routing, and center-tap coupling.

System designers should not base their device selection solely on balun data sheet performance. Experience can play a huge role here: the balun takes on a new form as an external matching network in the presence of PCB parasitics; the converter's internal impedance (load) also becomes part of the equation.

There are many important characteristics to consider when selecting a balun, which are beyond the scope of this article.

Anaren, Hyperlabs, Marki Microwave, MiniCircuits and Picosecond are the best solutions on the market today, offering the widest bandwidth. These patented designs use a special topology that allows for Gigabit-area bandwidth expansion with only a single device, providing a higher degree of balance.

A final note when using a single balun or multiple balun topology is that layout also plays an important role in phase imbalance. To maintain the best performance at high frequencies, the layout should be as symmetrical as possible. Otherwise, a slight mismatch in traces can render a front-end design using a balun useless or even limit the dynamic range.

Output Matching

Frequency-dependent components will always limit bandwidth, such as shunt capacitors and series inductors. That said, it may be more effective to think in terms of optimization rather than matching. Today, the ultra-wide bandwidth of baluns makes it almost impossible to "match" multi-octave spectrum ranges. Optimizing the above parameters requires a deep understanding of the end use of the system. For example, does the circuit need to provide maximum power transfer with less concern for SFDR? Or does it require the highest linearity design, with emphasis on SNR and SFDR with less concern for the output drive strength of the DAC? This means that the importance of each parameter should be weighed in the application.

In this example, the AD9129 GSPS DAC output network is shown in Figure 2. Each resistor and balun in this network can be changed, however, as each resistor value is changed, the performance parameters will also change as shown in Table 1.

 

 

Figure 2: AD9129 DAC output front-end functional block diagram

Table 1: Data definitions for several scenarios

 

The reader should note that the differences between the optimal component values ​​are very small. The balun components have the largest variation. The data in Figure 3 below shows the optimization of the DAC wideband noise output mode; the DAC simply generates tones across the full available spectral bandwidth.

The initial scenario shows a decrease in available power in the first Nyquist zone, with a high probability of aliased tones in the second, third, and fourth Nyquist zones. Case 2 shows an increase in output level in the first and second Nyquist zones, and a decrease in available power in the upper Nyquist zones. Finally, Case 3 is the best case, with what appears to be good output power in the first and second Nyquist zones, while keeping available power in zones 3 and 4 to a minimum compared to Case 1.

 

 

Figure 3: DAC performance in broadband noise mode

Figures 4 and 5 show the recorded data when the DAC is in single-tone mode. Figure 5 shows the output power level at different frequencies in multiple Nyquist zones. Figure 4 shows the SFDR for various cases vs. DAC output frequency. The reader should have a more complete understanding of the trade-offs in parameter planning, as these parameters must be understood and optimized as the design process unfolds. Clearly, Case 1 can be improved by replacing it with a wider bandwidth balun solution, which is Case 2.

Higher power levels and better SFDR are achieved in the second Nyquist zone. In addition, by using a 1:2 wideband balun in Case 3, the improved power levels are maintained while further improving the SFDR of the system. Other important findings are that there is a “sweet spot” for SFDR around 1900MHz. This performance is independent of the output components because of the internal impedance of the DAC.

 

 

Figure 4: SFDR performance comparison

 

 

Figure 5: Output power level comparison

in conclusion

Recent developments in GSPS DACs allow designers to skip multiple mixing stages in the transmit signal chain and directly process the desired RF band. When using GSPS DACs, the output network must be carefully considered. It is not easy to take all the specific characteristics into account when designing a high-speed, high-resolution converter layout. Special attention must be paid to the choice of balun when converting from the differential environment of the DAC output to a single-ended RF output.

Additionally, when designing the GSPS DAC output network, attention must be paid to the layout and topology of the network; trace width and length are very important parameters that need to be optimized. Remember, there are many parameters that need to be met in order to "fit" a specific application.

Reference address:Understanding and Designing Wideband Output Networks for High-Speed ​​D/A Converters

Previous article:Analysis of High-Power TVS Used in Automotive Electronics
Next article:How to Reduce Photodiode Bandwidth and Noise Effects

Latest Power Management Articles
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号