To make this possible, there should be a separate pin on the chip for the collector of driver transistor Q1 (Figure 1). At startup, D1 forms a path for Q1's collector current. Thereafter, D1 and C1 form a current-summing rectifier, increasing Q1's collector voltage and current, thereby reducing the voltage drop across closed switch Q2.
Figure 1: To achieve the two-component power-conversion efficiency improvement, the chip has a separate pin for the collector of driver transistor Q1.
Another advantage of this circuit is that it can operate at lower input voltages. Since the voltage on the driver collector is increased, the circuit can support a wider input range.
The value of C1 depends on the switching frequency. Generally, the value range is 47nF~150nF.
Depending on the input voltage and the parameters of Q1, resistor R1 may be required to prevent hard saturation of Q2 or to limit the collector current of Q1. In most cases, this resistor is not required (i.e., R1 = 0Ω).
An example of this design idea is shown in Figure 2, which uses the widely used MC33063/MC34063 in a buck configuration.
Figure 2: An example using the popular MC33063/MC34063 in a buck configuration.
When Vin = 12V, the above configuration (loaded with a 24Ω resistor) has an efficiency of 85% and a minimum input voltage of 7.5V.
Under the same conditions, the standard circuit without C1 and D1 and with pins 1 and 8 connected has an efficiency of 78% and a minimum input voltage of 8.2V.
This approach also works for an inverting converter configuration.
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