A small amount of parasitic capacitance (100 femtofarads) from the switch node to the input leads will prevent you from meeting electromagnetic interference (EMI) requirements. What does a 100fF capacitor look like? There aren’t many of them at Digi-Key. Even if there are, they offer wide tolerances due to parasitic issues.
However, it is easy to find 100fF capacitors as parasitic elements in your power supply. Only by dealing with them can you get an EMI-compliant power supply.
Figure 1 shows an example of these unintended capacitors. On the right side of the image is a vertically mounted FET with the switch node and clamp extending to the top of the image. The input connection comes in from the left and arrives within 1 cm of the drain connection. This is the fault point where the switching voltage waveform of the FET can bypass the EMI filter and couple to the input.
Figure 1. The proximity of the switch node to the input connection degrades EMI performance.
Note that there is some shielding between the drain connection and the input leads provided by the input capacitor. The case of this capacitor is connected to the main ground, providing a path for common-mode currents to return to the main ground. As shown in Figure 2, this tiny capacitance can cause the power supply EMI signature to exceed the specification requirements.
Figure 2. Parasitic drain capacitance causes EMI performance that exceeds specification requirements.
This is an interesting curve because it shows several issues: lower frequency emissions that are clearly outside the specification, 1MHz to 2MHz components where common mode issues are often evident, and an attenuated sine (x)/x distribution of higher frequency components.
Steps need to be taken to keep radiated emissions within specification. We reduce this using the general capacitance formula:
C = ε • A/d
We cannot change the permittivity (ε), and the area (A) is already at a minimum. However, we can change the spacing (d). As shown in Figure 3, we increased the distance between the components and the input by a factor of 3. Finally, we added shielding with a larger ground plane.
Figure 3. This modified layout not only increases spacing but also improves shielding performance.
图4是修改后的效果图。我们在故障点位置为EMI规范获得了大约6dB的裕量。此外,我们还显著减少了总体EMI 签名。所有这些改善都仅仅是因为布局的调整,并未改变电路。如果您的电路具有高电压开关并使用了屏蔽距离,您需要非常小心地对其进行控制。
Figure 4. EMI performance is improved through shielding and increased spacing.
In summary, 100fF of capacitance from the switch node of an offline switching power supply can result in an EMI signature that exceeds the specification requirements. This capacitance can be easily achieved with just parasitic elements, such as routing the drain connection close to the input leads. This problem can usually be solved by improving spacing or shielding. To achieve greater attenuation, additional filtering or slowing down the circuit waveform is required.
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