Many electronics enthusiasts have this experience: although mid-range and high-end digital multimeters have capacitance test gears, the measurement range is generally only 1pF~20µF, which often cannot meet the needs of users and brings inconvenience to capacitance measurement. The three-digit display capacitance test meter introduced in this circuit uses four integrated circuits. The circuit is simple, easy to make, the digital display is intuitive, the accuracy is high, and the measurement range can reach 1nF~104µF. It is especially suitable for enthusiasts and electrical maintenance personnel to make and use.
Working principle of the circuit: The capacitance meter circuit consists of a reference pulse generator, a capacitance-time converter to be measured, a gate controller, a decoder and a display. The capacitance-time converter to be measured converts the capacitance of the measured capacitance into a monostable time td which is proportional to its capacitance value. The base variable capacitance diode C value quasi-pulse generator generates a standard periodic counting pulse. The opening time of the gate controller is the monostable time td. Within the td time, the periodic counting pulse is sent to the counter behind through the gate for counting, and the decoder drives the display to display the value after decoding. The period T of the counting pulse multiplied by the count value N displayed on the display is the monostable time td. Since td is proportional to the capacitance of the measured capacitance, the capacitance of the measured capacitance can be known.
In Figure 2, the integrated circuit IC1B resistors R7~R9 and capacitor C3 form a reference pulse generator (essentially an unstable multivibrator). The pulse signal period T outputted by it is related to R7~R9 and C3. When C3 is fixed, three pulse signals with periods of 11µs, 1.1ms and 11ms can be obtained by different selections of R7, R8 and R9 by the range switch K1b. IC1A, IC2, R1~R6, button AN and C1 form a time converter of the capacitance to be measured (essentially a monostable circuit). When AN is pressed once, the 10th pin of IC2B generates a negative narrow pulse to trigger IC1A, and its 5th pin outputs a single high-level signal. R3~R6 and the capacitor CX to be measured are monostable time elements, and the monostable time td=1.1(R3~R6)CX. IC4, IC2C, C5, C6, and R10 constitute a gate controller and counter. IC4 is CD4553, whose pin 12 is the counting pulse input terminal, and pin 10 is the counting enable terminal. When the potential is low, CD4553 performs counting, and pin 13 is the counting reset terminal, and the rising edge is valid. When AN is pressed, pin 13 of IC4 gets a rising pulse, the counter is reset, and at the same time, pin 4 of IC2C outputs a monostable low-level signal to pin 10 of IC4, so IC4 counts the reference counting pulse input from its pin 12. When the monostable time ends, pin 10 of IC4 becomes a high level, and IC4 stops counting. Finally, IC4 outputs the corresponding BCD code of the units, tens, and hundreds of the counting result through its pins 9, 7, 6, and 5 in a time-sharing transmission mode.
IC3 constitutes the decoder driver, which translates the BCD code sent by IC4 into a decimal digital segment code, and directly drives the seven-segment digital tube after current limiting by R11~R17. Pins 15, 1, and 2 of the integrated circuit CD4553 are digital selection output terminals, and the selection pulses are sent to the bases of transistors T1~T3 through R18~R20 to make them turn on in turn. The cooperation of these two parts of the circuit completes the three-digit decimal digital display. The function of C7 is to generate a rising pulse on R10 when the power is turned on, and automatically clear the counter.
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