A fast response LDO loop design

　　1 Introduction

　　Low Drop-Out regulator (LDO) is increasingly used in the power supply system of portable electronic devices. Based on the structural characteristics of the LDO regulator, this paper designs a fast response path, which enables the error amplifier to output a large voltage response by feeding back the high-frequency or rapidly changing output voltage. The circuit has the characteristics of fast response speed and good stability, and can be widely used in different low dropout linear regulators.

　　2 LDO Working Principle

　　FIG1 is a schematic diagram showing the working principle of a low voltage drop linear regulator.

　　One end of the error amplifier is connected to the reference voltage Vref, the other end is connected to the feedback loop, and the output end is connected to the adjustment output tube Mp. By comparing and amplifying the difference between the reference voltage and the feedback voltage, the gate voltage of the adjustment tube is controlled, thereby controlling the current passing through the transistor, so that the circuit reaches a stable output voltage.

　　3 Error Amplifier and Buffer Stage Design

　　3.1 Introduction

　　Figure 2 is a schematic diagram of the circuit.

　　In Figure 2, Vref is the reference voltage input; Vfb is the sampling voltage feedback terminal; Vbh and Vbl are high and low level bias respectively; Vout is the output voltage feedback. Vo is connected to the gate of the PMOS adjustment tube. The error amplifier compares the sampling voltage Vfb with the reference voltage Vref, thereby changing the output voltage Vo, controlling the output current of the adjustment tube, and achieving a stable output voltage.

　　M81 and M82 are differential pair input tubes. M105 and M106 are current mirrors, which serve as loads for the differential pair tubes. M88 and M89 are tail current sources, which provide bias currents for the differential pair tubes. R20 provides a path for the differential AC current of the differential pair tubes to flow to the ground, that is, no common-mode current flows through R20, and the midpoint is the AC ground. Q1, Q98, Q93, Q95, and Q9 form a current buffer, which provides a large charge and discharge current for the gate capacitance of the adjustment tube. At the same time, the pole frequency of the gate node of the adjustment tube is also increased, that is, from 1/(Roa×Cgs) to 1/[(2/g)×Cgs], Roa is the output resistance of the error amplifier, Cgs is the gate capacitance of the adjustment tube, and g is the transconductance of Q98 and Q9. By using the property that the voltage across the two capacitors C4 and C5 cannot change suddenly, the base voltage changes of Q98 and Q9 are kept consistent, making the circuit more stable.

　　For DC or low-frequency Vout signals, M83-M86 will not cause changes in the output signal of the voltage difference amplifier. However, since the bypass capacitor C1 short-circuits the source of M83 at high frequency, for rapid changes in the Vout signal, M83-M86 will generate a large unbalanced AC current at the output of the voltage difference amplifier, resulting in a large swing in the output voltage change. This greatly improves the response speed of the voltage difference amplifier to high-frequency or rapidly changing Vout signals.

　　C3 is connected to the source of M81 and the base of Q98 in the buffer stage. For large signals, if the common-source connected M81 tube is regarded as a common-drain connection (voltage buffer), the source voltage of M81 changes with the Vfb signal; if the influence of the emitter resistance of Q1 and Q95 is ignored, C3 and C4, C5 can be regarded as a capacitor voltage-dividing connection, so the midpoint (Q98 base) voltage will also change with the Vfb signal. For fast-changing Vfb signals, C3 provides a fast propagation path from the feedback signal to the gate of the adjustment tube, and because this path bypasses the differential amplifier, this path has no gain for the feedback signal, avoiding the transient overshoot and undershoot of the output voltage caused by excessive switching control of the adjustment tube. 3.2 Common Mode Rejection Ratio (CMRR)

　　Under common-mode signals, assuming that M81 has a dynamic current i1, the current i2 mapped to the Y node by the current mirror is i1; and under common-mode signals, M82 has a dynamic current i3 to the Y node. When secondary effects such as the back gate effect and the channel modulation effect and circuit mismatch are ignored, i2 is equal to i3, that is, there is no net dynamic current at the Y node, so the common-mode signal does not cause changes in the output voltage.

　　In actual circuits, due to various non-ideal conditions, such as mismatch of current mirror, mismatch of differential tube transconductance, etc., common-mode signals will cause changes in output voltage. To simplify the analysis, various mismatches are lumped together as the mismatch △g of the transconductance of current mirror M105 and M106. If the transconductance of M105 is g, then the transconductance of M106 is g+△g, and the impedance of output node Y is ro, the output impedance of M88 and M89 is r1, and the differential tube transconductance is g1, then:

　　In the differential signal state, let the transconductance of M81, M82 be g1, and the output resistance of M106, M82 be ro106, ro82, then the transconductance of the differential pair is:

　　Figure 4 is a fast response simulation, which shows that for a 10 mV up jump and a 20 mV down jump of the Vout signal, the output voltage of the error amplifier has a jump of hundreds of millivolts. Therefore, for a small change in the output circuit, it can be quickly transmitted to the output of the error amplifier, thereby adjusting the transmission tube.

　　Figure 5 shows the change in system output voltage when the load current jumps by 50 mA before and after adding capacitor C3 (left picture shows without C3, right picture shows with C3). Comparing the two pictures, it can be seen that when there is no C3, the output voltage oscillates, while after adding C3, the output voltage changes monotonically. Figure 6 shows the amplitude-frequency and phase-frequency response curves of the error amplifier.

　　5 Conclusion

　　According to the structural characteristics of the LDO regulator, this paper designs a fast response path, which enables the error amplifier to output a large voltage response by feeding back the high-frequency or rapidly changing output voltage. This circuit has the characteristics of fast response speed and good stability, and can be widely used in different low voltage dropout linear regulators.